Developing embedded systems that are distributed is a challenging endeavour, since they need to ensure system-wide properties as well as existence of a large number of possible candidate system architectures. Various model based techniques advocate raising the abstraction level in order to support a holistic view of such a distributed embedded system. Furthermore, automatically generating implementation specific code from models can support realisation efforts including avoiding inconsistencies between model and code. In this paper we present how such efforts can be aided for a distributed embedded system modelled in the real time dialect of the Vienna Development Method, VDM-RT, by means of automatic code generation. The contributions in this paper are (1) code generation capabilities for distributed embedded system modelled in VDM-RT; (2) demonstration of its applicability for an industrial case study involving a distributed interlocking system from the railways domain. Additionally, we discuss the balance between code generation for a model, which assumes idealised communication (no messages lost), and manually produced code, e.g. in the industrial case study legacy low-level code ensures fault-tolerant communication in the final implementation.

中文翻译：

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使用VDM-RT的分布式嵌入式系统的代码生成

开发分布式嵌入式系统是一项具有挑战性的工作，因为它们需要确保系统范围的属性以及大量可能的候选系统体系结构的存在。各种基于模型的技术主张提高抽象级别，以支持这种分布式嵌入式系统的整体视图。此外，从模型自动生成特定于实现的代码可以支持实现工作，包括避免模型与代码之间的不一致。在本文中，我们介绍了如何通过自动代码生成为以维也纳开发方法VDM-RT的实时方言建模的分布式嵌入式系统提供帮助。本文的贡献是：（1）在VDM-RT中建模的分布式嵌入式系统的代码生成功能；（2）证明其适用于涉及铁路领域的分布式联锁系统的工业案例研究。此外，我们讨论了模型的代码生成（假设进行理想的通信（没有消息丢失））与手动生成的代码之间的平衡，例如在工业案例研究中，遗留的低级代码可确保最终实现中的容错通信。