In order to define executable hardware description language while at the same time be fit for formal proofs of properties, a hardware description language VeriFormal, embedded in Isabelle/HOL, was created. VeriFormal, together with a translator and Isabelle/HOL proof facility, provides a platform for designing, simulating and reasoning about hardware designs. Building such an environment is challenging due to the fact that the designer must have expertise in programming language design, the specific domain and theorem prover. It requires selection of a language design criteria, host language, grammar, embedding approach and techniques and mechanisms to address determinism and termination issues. When the language in question is a hardware description language, it requires specialized treatment of events, their scheduling, data types and assignments. In this paper, we report on our experience of embedding hardware description language VeriFormal in theorem prover Isabelle/HOL. In particular, the structure and execution of programs in the context of theorem provers and their impact on the overall language design are discussed. Among the main features of VeriFormal include formal semantics of the language, support for mechanical reasoning about designs and compiler and type checking of modules using Isabelle/HOL as well as VeriFormal type checkers.

中文翻译：

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在Isabelle / HOL中嵌入硬件描述语言时

为了定义可执行的硬件描述语言，同时又适合于形式化的属性证明，创建了嵌入在Isabelle / HOL中的硬件描述语言VeriFormal。VeriFormal连同翻译器和Isabelle / HOL证明工具一起，为硬件设计的设计，仿真和推理提供了一个平台。由于设计人员必须具备编程语言设计，特定领域和定理证明者的专业知识，因此构建这样的环境具有挑战性。它要求选择语言设计标准，宿主语言，语法，嵌入方法以及解决确定性和终止问题的技术和机制。当相关语言是硬件描述语言时，它需要对事件，事件的调度，数据类型和分配。在本文中，我们报告了在定理证明者Isabelle / HOL中嵌入硬件描述语言VeriFormal的经验。特别是，讨论了在定理证明的上下文中程序的结构和执行及其对整体语言设计的影响。VeriFormal的主要功能包括语言的形式语义，对设计和编译器的机械推理的支持以及使用Isabelle / HOL以及VeriFormal类型检查器的模块的类型检查。