This work presents Memphis, which comprises a flexible EDA framework and a many-core model for heterogeneous SoCs. The framework, together with the many-core model supports the integration of processors, network interfaces, routers, and peripherals. A set of tools enable a decoupled generation and compilation of the hardware, operating systems, and applications. The hardware model is cycle-accurate, with a SystemC model to speed up simulation time and a VHDL model enabling prototyping in FPGAs devices. The framework provides a rich set of graphical debugging tools enabling an easy and intuitive understanding of computation and communication events happening at runtime. The coupled integration of the platform model to the EDA framework makes Memphis well suited to be employed in research and teaching. As case studies, we provide a set of evaluations addressing the many-core generation, simulation, and debugging. Different applications sets were employed, enabling to characterize the computation and communication performance of the many-core, as well as, evaluate an AES encryption application performance according to different levels of parallelism.

中文翻译：

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孟菲斯：异构多核SoC生成和验证的框架

本文介绍了孟菲斯，其中包括一个灵活的EDA框架和一个用于异构SoC的多核模型。该框架与多核模型一起支持处理器，网络接口，路由器和外围设备的集成。一组工具可实现硬件，操作系统和应用程序的分离生成和编译。硬件模型具有周期精确性，其中SystemC模型可加快仿真时间，而VHDL模型可在FPGA器件中进行原型设计。该框架提供了丰富的图形调试工具集，使您可以轻松直观地了解运行时发生的计算和通信事件。平台模型与EDA框架的耦合集成使孟菲斯非常适合在研究和教学中使用。作为案例研究 我们提供了一套针对多核生成，仿真和调试的评估。采用了不同的应用程序集，从而能够表征多核的计算和通信性能，并根据不同的并行度评估AES加密应用程序的性能。