Content-addressable memories (CAMs) are used in a variety of applications, such as IP filtering, data compression, and artificial neural networks due to its high-speed lookup. Fast field-programmable gate arrays (FPGAs) are nowadays used to emulate CAMs. These CAM emulations either make use of logical resources or use memory blocks on FPGAs to emulate CAMs. However, such CAM emulation suffers from slower mapping and updating mechanisms, which results in an unacceptable response in real-time applications. The slower response in update mechanism is proportionate to the CAM depth in the schemes. In this article, fast mapping and updating algorithms for a binary CAM (FMU-BiCAM) are presented, which efficiently utilizes lookup tables, slice registers, and block random access memories (RAMs) on Xilinx FPGA to emulate faster mapping and updating CAMs. The advantage of the proposed work lies in directly applying the CAM key as an address, which helps in updating contents in memory units. CAMs in the literature exhaust the entire CAM depth in remapping the CAM words along with the updating word, which leads to higher update latency. The proposed algorithms are implemented on Xilinx Virtex–6 FPGA, and the results show that the proposed method brings latency to only two clock cycles during update.

中文翻译：

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FPGA 上二进制 CAM 的快速映射和更新算法

内容可寻址存储器 (CAM) 因其高速查找而被用于各种应用，例如 IP 过滤、数据压缩和人工神经网络。快速现场可编程门阵列 (FPGA) 现在用于模拟 CAM。这些 CAM 仿真要么利用逻辑资源，要么使用 FPGA 上的内存块来仿真 CAM。然而，这种 CAM 仿真存在较慢的映射和更新机制，这导致实时应用程序的响应不可接受。更新机制中较慢的响应与方案中的 CAM 深度成正比。本文介绍了二进制 CAM (FMU-BiCAM) 的快速映射和更新算法，该算法有效地利用 Xilinx FPGA 上的查找表、切片寄存器和块随机存取存储器 (RAM) 来模拟更快的映射和更新 CAM。所提出的工作的优点在于直接应用 CAM 密钥作为地址，这有助于更新内存单元中的内容。文献中的 CAM 在重新映射 CAM 字和更新字时耗尽了整个 CAM 深度，这导致更高的更新延迟。所提出的算法在 Xilinx Virtex-6 FPGA 上实现，结果表明，所提出的方法在更新期间仅将延迟降低到两个时钟周期。