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Emulation and verification framework for MPSoC based on NoC and RISC-V
Design Automation for Embedded Systems ( IF 1.4 ) Pub Date : 2022-09-14 , DOI: 10.1007/s10617-022-09265-1
Mostafa Khamis , Sameh El-Ashry , Mohamed AbdElsalam , M. Watheq El-Kharashi , Ahmed Shalaby

Nowadays, embedded systems have multiprocessing capabilities to meet the complexity of modern applications, such as signal processing and multimedia. However, as the embedded system’s functionality expands, complexity increases and numerous constraints become necessary. Constraints, such as high performance, low power consumption, and development time, became critical demands. Therefore, emulation and verification are necessary to assess the correctness and performance of such architectures and accelerate the development phase. We propose a robust, scalable, and flexible hardware-software emulation framework that focuses on design space exploration for MPSoC architectures. Our framework supports 2D and 3D NoC-based architectures built on an open-source RISC-V. According to user configuration, the framework auto-generates the corresponding universal verification methodology environment to explore the design space, evaluate the performance, and compare the results for wide configurations and parameters. Then, it provides the best solution based on provided user criteria. Our framework uses an emulation co-modeling technology to enable the designer to explore and detect architecture failures. We provide numerous experimental results for different 2D and 3D NoC architectures to assess their correctness and performance, including energy and power consumption. Noticeably, results show an acceleration by \(40\times \) in comparison to software simulators.



中文翻译:

基于 NoC 和 RISC-V 的 MPSoC 仿真和验证框架

如今,嵌入式系统具有多处理能力,可以满足现代应用程序的复杂性,例如信号处理和多媒体。然而,随着嵌入式系统功能的扩展,复杂性增加并且许多约束变得必要。高性能、低功耗和开发时间等约束成为关键要求。因此,仿真和验证对于评估此类架构的正确性和性能并加速开发阶段是必要的。我们提出了一个强大、可扩展且灵活的硬件-软件仿真框架,专注于 MPSoC 架构的设计空间探索。我们的框架支持基于开源 RISC-V 构建的 2D 和 3D NoC 架构。根据用户配置,该框架自动生成相应的通用验证方法环境,以探索设计空间、评估性能并比较广泛配置和参数的结果。然后,它根据提供的用户标准提供最佳解决方案。我们的框架使用仿真协同建模技术,使设计人员能够探索和检测架构故障。我们为不同的 2D 和 3D NoC 架构提供了大量实验结果,以评估它们的正确性和性能,包括能耗和功耗。值得注意的是,结果显示加速度 我们的框架使用仿真协同建模技术,使设计人员能够探索和检测架构故障。我们为不同的 2D 和 3D NoC 架构提供了大量实验结果,以评估它们的正确性和性能,包括能耗和功耗。值得注意的是,结果显示加速度 我们的框架使用仿真协同建模技术,使设计人员能够探索和检测架构故障。我们为不同的 2D 和 3D NoC 架构提供了大量实验结果,以评估它们的正确性和性能,包括能耗和功耗。值得注意的是,结果显示加速度\(40\times \)与软件模拟器相比。

更新日期:2022-09-15
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