Industry 4.0 and IoT are emerging computing environments for low energy devices. Implementing complex security mechanisms in such environment is challenging. A lightweight and energy aware hashing provides high security to the devices under these environments. Earlier hash algorithms such as SHA and MD5 were very complex and hence are not suitable for the energy constrained devices. Similar hashing algorithm is needed for low energy devices as well. The authors proposed a sponge based hashing algorithm that is capable of providing a security up to second preimage attack to the devices communicating under such constrained environments. The methodology of the proposed design is derived from some existing lightweight hash constructions such as Photon, Quark, Gluon, and Spongent. The steps in the algorithm of DeeR-Hash include the steps for DeeRSponge and DeeRStateUpdate as well. To construct the sponge for the proposed hashing, the authors had taken the value of b, r, and c as 80, 2, and 78 respectively. After implementing the algorithm in a tag-reader scenario, the authors find that it is taking only 483 GE for 80-bits digest and is suitable for a lightweight cryptographic environment. The avalanche effect produced by the proposed algorithm further strengthens the security claim of the authors. Comparing other related work in this area, the authors claim that the required area in ASIC in lowest.

中文翻译：

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DeeR-Hash：用于工业 4.0 / IoT 的轻量级哈希结构

工业 4.0 和物联网是低能耗设备的新兴计算环境。在这样的环境中实施复杂的安全机制具有挑战性。轻量级和能量感知哈希为这些环境下的设备提供高安全性。早期的散列算法（如 SHA 和 MD5）非常复杂，因此不适合能量受限的设备。低能耗设备也需要类似的哈希算法。作者提出了一种基于海绵的哈希算法，该算法能够为在这种受限环境下通信的设备提供高达二次原像攻击的安全性。拟议设计的方法源自一些现有的轻量级哈希结构，例如 Photon、Quark、Gluon 和 Spongent。DeeR-Hash 的算法步骤包括 DeeRSponge 和 DeeRStateUpdate 的步骤。为了为建议的哈希构造海绵，作者将 b、r 和 c 的值分别设为 80、2 和 78。在标签阅读器场景中实现该算法后，作者发现它仅需要 483 GE 用于 80 位摘要，适用于轻量级密码环境。所提出的算法产生的雪崩效应进一步加强了作者的安全声明。与该领域的其他相关工作相比，作者声称 ASIC 中所需的面积最低。作者发现 80 位摘要只需要 483 GE，适用于轻量级密码环境。所提出的算法产生的雪崩效应进一步加强了作者的安全声明。与该领域的其他相关工作相比，作者声称 ASIC 中所需的面积最低。作者发现 80 位摘要只需要 483 GE，适用于轻量级密码环境。所提出的算法产生的雪崩效应进一步加强了作者的安全声明。与该领域的其他相关工作相比，作者声称 ASIC 中所需的面积最低。