Higher complexity in recent chip designs, module integration, and increasing test quality requirements have expanded measurement needs and further increased chip test costs. Multi-site testing (parallel measurement) solves this issue by taking test measurements from multiple chips simultaneously, massively increasing throughput, and significantly reducing the test time per chip. Massive multi-site testing system, a setup with significant measurement site count, further improves throughput and maximizes gains. However, it unavoidably amplifies site-to-site variations in the measured specifications. This problem is particularly magnified in analog and mixed-signal chips. Some measurement sites now exhibit pronounced induced errors, and their measurements no longer reflect the actual performance of the device under test (DUT). This problem presents a solid need to identify sites that suffer from extreme site-to-site variations (issue sites). We propose an automated method to investigate site-to-site variations in volume multi-site data and identify issue sites that may not be obvious via human inspection or basic statistical methods. Assuming that all measurement sites have the same accuracy and precision, we consider an issue site to be one whose weighted-bin difference score is greater than an analytically derived upper bound. We apply the proposed method to simulation data and volume test data obtained from an industrial analog and mixed-signal system on chips (SoCs) that were tested using multi-site testing hardware and show that the technique can effectively identify issue sites in the testing system. We compare the proposed algorithm to existing methods and demonstrate its superior performance.

最近的芯片设计、模块集成和测试质量要求越来越复杂，这些都扩大了测量需求并进一步增加了芯片测试成本。多站点测试（并行测量）通过同时从多个芯片进行测试测量来解决这个问题，大幅提高吞吐量，并显着减少每个芯片的测试时间。大型多站点测试系统，具有大量测量站点的设置，进一步提高了吞吐量并使收益最大化。但是，它不可避免地会放大测量规格中的站点到站点差异。这个问题在模拟和混合信号芯片中尤为突出。一些测量点现在表现出明显的诱导误差，它们的测量值不再反映被测设备 (DUT) 的实际性能。这个问题提出了确定站点之间存在极端差异（问题站点）的站点的迫切需要。我们提出了一种自动化方法来调查大量多站点数据中的站点到站点变化，并确定通过人工检查或基本统计方法可能不明显的问题站点。假设所有测量站点都具有相同的准确度和精度，我们将问题站点视为其加权 bin 差异分数大于分析得出的上限的站点。我们将所提出的方法应用于从使用多站点测试硬件测试的工业模拟和混合信号片上系统 (SoC) 获得的仿真数据和体积测试数据，表明该技术可以有效地识别测试系统中的问题站点.