In this paper, a fully-differential transimpedance amplifier (TIA) providing a high gain-BW product (GBP) is introduced. In the proposed architecture, a cascode cross-coupled structure is employed to double the effective transconductance of the cascode devices, improving the BW of the TIA. Moreover, a differential architecture is implemented using an RC high-pass filter along with a buffer stage requiring smaller capacitance and resistance. Furthermore, a single-ended negative capacitance generation (NCG) circuit is employed at the input of the TIA to partially compensate for the input parasitic capacitances. A TIA including the proposed techniques, designed and laid out in a 16-nm FinFET process, demonstrates 57% and 79% better figure-of-merit compared to cascode and conventional TIAs designed along with the proposed TIA for a fair comparison, respectively. Post-layout simulations in companion with statistical analysis are employed to verify the effectiveness of the proposed architecture. From simulation results, the optical receiver achieves a peak transimpedance gain of 58.5 dB $\Omega $ , a BW of 14.8 GHz, an input-referred noise of 33.6 pA/ $\surd $ Hz, and an eye-opening of 30 mV at a data-rate of 56 Gbps PAM4 and at a bit-error-rate (BER) of 1E-6. The whole circuit consumes 49 mW and occupies an active area of 0.0076 mm 2.

中文翻译：

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采用 16 纳米 FinFET 工艺的高增益 BW 产品差分跨阻放大器的无电感器光接收器前端

在本文中，介绍了一种提供高增益带宽积 (GBP) 的全差分跨阻放大器 (TIA)。在所提出的架构中，采用级联交叉耦合结构来使级联器件的有效跨导加倍，从而改善 TIA 的 BW。此外，差分架构是使用 RC 高通滤波器以及需要更小电容和电阻的缓冲级来实现的。此外，在 TIA 的输入端采用单端负电容生成 (NCG) 电路来部分补偿输入寄生电容。与提议的 TIA 一起设计的共源共栅和传统 TIA 相比，采用 16 纳米 FinFET 工艺设计和布局的 TIA 展示了 57% 和 79% 更好的品质因数，以进行公平比较，分别。布局后仿真与统计分析相结合，用于验证所提出架构的有效性。从仿真结果来看，光接收器实现了 58.5 dB 的峰值互阻抗增益 $\欧米茄$ ，14.8 GHz 的带宽，33.6 pA/ 的输入参考噪声 $\苏德 $ Hz，在 56 Gbps PAM4 的数据速率和 1E-6 的误码率 (BER) 下，眼图张度为 30 mV。整个电路功耗为 49 mW，有效面积为 0.0076 mm 2。