Currently, static circuit power is becoming a major concern, dominating the total power consumption due to the scaling down of CMOS technology. The smaller sizes drastically affect the leakage current, which integrated circuit designers attempt to overcome this issue. Hence, several methods and technologies have been proposed to prevail this phenomenon. One of these methods is using memory structures in logic designs. A Hybrid MTJ/CMOS circuit is one of these promising techniques to design low-power nonvolatile circuits with power gating ability and low overhead for reconfigurable possibilities. In this paper, we have proposed a fully nonvolatile, low-power Full-Adder based on MTJs that uses the spin transfer torque method assisted by the spin hall effect. Simulation results of these designs by HSPICE show that they can work fast with low-power consumption compared to other state-of-the-art nonvolatile full-adders.

目前，静态电路功耗正成为一个主要问题，由于 CMOS 技术的缩小，静态电路功耗在总功耗中占据主导地位。较小的尺寸会极大地影响漏电流，集成电路设计人员试图克服这个问题。因此，已经提出了几种方法和技术来克服这种现象。其中一种方法是在逻辑设计中使用存储器结构。混合 MTJ/CMOS 电路是设计具有功率门控能力和低开销的低功耗非易失性电路的有前途的技术之一，以实现可重新配置的可能性。在本文中，我们提出了一种基于 MTJ 的完全非易失性、低功耗全加器，该全加器使用自旋霍尔效应辅助的自旋转移矩方法。