Recently, there is a trend to use high-level synthesis (HLS) tools to generate dynamically scheduled hardware. The generated hardware is made up of components connected using handshake signals. These handshake signals schedule the components at runtime when inputs become available. Such approaches promise superior performance on “irregular” source programs, such as those whose control flow depends on input data. This is at the cost of additional area. Current dynamic scheduling techniques are well able to exploit parallelism among instructions within each basic block (BB) of the source program, but parallelism between BBs is under-explored, due to the complexity in runtime control flows and memory dependencies. Existing tools allow some of the operations of different BBs to overlap, but to simplify the analysis required at compile time they require the BBs to start in strict program order, thus limiting the achievable parallelism and overall performance.

We formulate a general dependency model suitable for comparing the ability of different dynamic scheduling approaches to extract maximal parallelism at runtime. Using this model, we explore a variety of mechanisms for runtime scheduling, incorporating and generalising existing approaches. In particular, we precisely identify the restrictions in existing scheduling implementation and define possible optimisation solutions. We identify two particularly promising examples where the compile-time overhead is small and the area overhead is minimal and yet we are able to significantly speed up execution time: (1) parallelising consecutive independent loops; and (2) parallelising independent inner-loop instances in a nested loop as individual threads. Using benchmark sets from related works, we compare our proposed toolflow against a state-of-the-art dynamic-scheduling HLS tool called Dynamatic. Our results show that, on average, our toolflow yields a 4× speedup from (1) and a 2.9× speedup from (2), with a negligible area overhead. This increases to a 14.3× average speedup when combining (1) and (2).

最近，有一种趋势是使用高级综合（HLS）工具来生成动态调度的硬件。生成的硬件由使用握手信号连接的组件组成。当输入可用时，这些握手信号在运行时调度组件。这种方法保证了“不规则”源程序的卓越性能，例如那些控制流依赖于输入数据的源程序。这是以额外面积为代价的。当前的动态调度技术能够很好地利用源程序的每个基本块（BB）内的指令之间的并行性，但是不同指令之间的并行性由于运行时控制流和内存依赖性的复杂性，BB 尚未得到充分探索。现有工具允许不同BB的某些操作重叠，但为了简化编译时所需的分析，它们要求BB按照严格的程序顺序启动，从而限制了可实现的并行性和整体性能。

我们制定了一个通用依赖模型，适用于比较不同动态调度方法在运行时提取最大并行性的能力。使用这个模型，我们探索了各种运行时调度机制，合并和推广了现有方法。特别是，我们精确地识别了现有调度实施中的限制并定义了可能的优化解决方案。我们确定了两个特别有前途的示例，其中编译时开销很小且区域开销最小，但我们能够显着加快执行时间：（1）并行化连续的独立循环；(2) 将嵌套循环中的独立内循环实例并行化为单独的线程。使用相关作品中的基准集，我们将我们提出的工具流与最先进的动态调度 HLS 工具（称为 Dynamatic）进行比较。我们的结果表明，平均而言，我们的工具流程比 (1) 获得 4 倍的加速，比 (2) 获得 2.9 倍的加速，而面积开销可以忽略不计。当结合 (1) 和 (2) 时，平均加速增加到 14.3 倍。