This work presents a power stage architecture that combines high–linearity with high–efficiency. The power stage is configured as a push–pull Class–A topology with two buck–converters providing its supply rails. The buck–converters continuously track the stage’s output with a small constant margin, creating a minimum, constant voltage drop on the output devices; thus, the stage’s efficiency is increased and its linearity is improved. Theoretical analysis of the topology and its feedback control are presented, while a design example is implemented and simulated in Cadence Spectre as proof–of–concept.

中文翻译：

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CTA 级：高线性度和效率功率级架构的概念和理论分析

这项工作提出了一种将高线性度与高效率相结合的功率级架构。功率级配置为推挽 A 类拓扑，并由两个降压转换器提供其电源轨。降压转换器以较小的恒定余量连续跟踪级的输出，从而在输出设备上产生最小的恒定压降；因此，该级的效率得到提高，线性度得到改善。介绍了拓扑及其反馈控制的理论分析，同时在 Cadence Spectre 中实现和模拟了一个设计示例作为概念验证。