Three-dimensional device integration facilitates the construction of superconducting quantum information processors with more than several tens of qubits by distributing elements such as control wires, qubits, and resonators between multiple layers. The frequencies of resonators and qubits in flip-chip-bonded multi-chip modules depend on the details of their electromagnetic environment defined by the conductors and dielectrics in their vicinity. Accurate frequency targeting therefore requires precise control of the separation between chips and minimization of their relative tilt. Here, we describe a method to control the inter-chip separation by using polymer spacers. With the spacers, we measure a mean tilt of (76 ± 36) μrad, and a mean deviation of (0.4 ± 0.8) μm from the target inter-chip separation of 10 μm. We apply this process to coplanar waveguide resonator samples and observe chip-to-chip resonator frequency variations below 50 MHz ( $\approx 1\%$ ). We measure internal quality factors of $5\times10^{5}$ at the single-photon level, suggesting that the added spacers are compatible with low-loss device fabrication.

中文翻译：

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通过聚合物间隔工艺改进 3D 集成超导电路中的参数定位

三维器件集成通过在多层之间分布控制线、量子位和谐振器等元件，有利于构建具有数十个量子位的超导量子信息处理器。倒装芯片接合的多芯片模块中的谐振器和量子位的频率取决于其附近的导体和电介质所定义的电磁环境的细节。因此，精确的频率定位需要精确控制芯片之间的间隔并最小化它们的相对倾斜。在这里，我们描述了一种通过使用聚合物间隔物来控制芯片间分离的方法。使用垫片，我们测量到平均倾斜度为 (76 ± 36) μrad，与目标芯片间间距 10 μm 的平均偏差为 (0.4 ± 0.8) μm。我们将此过程应用于共面波导谐振器样本，并观察芯片到芯片谐振器频率变化低于 50 MHz ($\approx 1\%$)。我们在单光子水平上测量了 $5\times10^{5}$ 的内部质量因数，表明添加的间隔物与低损耗器件制造兼容。