Graphics Processing Units (GPUs) compilers have evolved in order to support general-purpose programming languages for multiple architectures. NVIDIA CUDA Compiler (NVCC) has many compilation levels before generating the machine code and applies complex optimizations to improve performance. These optimizations modify how the software is mapped in the underlying hardware; thus, as we show in this article, they can also affect GPU reliability. We evaluate the effects on the GPU error rate of the optimization flags applied at the NVCC Parallel Thread Execution (PTX) compiling phase by analyzing two NVIDIA GPU architectures (Kepler and Volta) and two compiler versions (NVCC 10.2 and 11.3). We compare and combine fault propagation analysis based on software fault injection, hardware utilization distribution obtained with application-level profiling, and machine instructions radiation-induced error rate measured with beam experiments. We consider eight different workloads and 144 combinations of compilation flags, and we show that optimizations can impact the GPUs’ error rate of up to an order of magnitude. Additionally, through accelerated neutron beam experiments on a NVIDIA Kepler GPU, we show that the error rate of the unoptimized GEMM (-O0 flag) is lower than the optimized GEMM’s (-O3 flag) error rate. When the performance is evaluated together with the error rate, we show that the most optimized versions (-O1 and -O3) always produce a higher amount of correct data than the unoptimized code (-O0).

图形处理单元 (GPU) 编译器不断发展，以支持多种架构的通用编程语言。 NVIDIA CUDA 编译器 (NVCC) 在生成机器代码之前具有多个编译级别，并应用复杂的优化来提高性能。这些优化修改了软件在底层硬件中的映射方式；因此，正如我们在本文中所示，它们也会影响 GPU 的可靠性。我们通过分析两个 NVIDIA GPU 架构（Kepler 和 Volta）和两个编译器版本（NVCC 10.2 和 11.3），评估了在 NVCC 并行线程执行 (PTX) 编译阶段应用的优化标志对 GPU 错误率的影响。我们比较并结合了基于软件故障注入的故障传播分析、通过应用级分析获得的硬件利用率分布以及通过波束实验测量的机器指令辐射引起的错误率。我们考虑了 8 种不同的工作负载和 144 种编译标志组合，结果表明优化可以将 GPU 的错误率影响高达一个数量级。此外，通过 NVIDIA Kepler GPU 上的加速中子束实验，我们表明未优化的 GEMM（-O0 标志）的错误率低于优化的 GEMM（-O3 标志）的错误率。当性能与错误率一起评估时，我们发现最优化的版本（-O1 和 -O3）总是比未优化的代码（-O0）产生更多的正确数据。