Implantable neural stimulation is becoming increasingly popular for treating neurologically impaired patients, restoring neural functions which would otherwise be lost due to diseases or injuries. The charge balance of the stimulus pulses is of paramount importance for the long-term safety of the electrode-tissue interface. This paper presents a novel neurostimulator integrated circuit in which two novel charge balancing schemes are proposed. One is based on acquiring the access resistance part (R_S) of the inter-electrode impedance. Thanks to its adaptive anodic phase, the R_S-based charge balance circuit does not require an additional discharge phase, achieving faster charge balance than most existing stimulator ICs. The other scheme is based on acquiring the double-layer capacitance part (C_DL) of the inter-electrode impedance and the entire charge balancing process (inc. monitoring, computation and compensation) is performed in the analog domain. This is in sharp contrast to the existing electrode-impedance-aware charge balancing schemes which require ADCs and compute the net charge in the digital domain. Hence the new impedance-aware charge-balancing scheme is faster and more power friendly. The impedance-aware stimulator ASIC has been implemented using X-FAB’s 180-nm CMOS process. The post-layout simulation results suggest a good charge balance is achieved as the voltage deviation from the electrode offset voltage on the electrode after the charge compensation reduces to 2.64 mV and –1.39 mV under the R_S-based and C_DL-based charge balancing schemes, respectively. The additional power overhead due to the proposed C_DL-based charge balancer circuit is 2.46 μW at a stimulation rate of 400 Hz.

植入式神经刺激越来越受欢迎，用于治疗神经受损患者，恢复因疾病或损伤而丧失的神经功能。刺激脉冲的电荷平衡对于电极-组织界面的长期安全至关重要。本文提出了一种新型神经刺激器集成电路，其中提出了两种新型电荷平衡方案。一种是基于获取电极间阻抗的接入电阻部分( R _{S )。}由于其自适应阳极阶段，基于RS_的电荷平衡电路不需要额外的放电阶段，从而比大多数现有刺激器 IC 实现更快的电荷平衡。另一种方案基于获取电极间阻抗的双层电容部分（ C _{DL ），并且整个电荷平衡过程（包括监控、计算和补偿）在模拟域中执行。}这与现有的电极阻抗感知电荷平衡方案形成鲜明对比，后者需要 ADC 并计算数字域中的净电荷。因此，新的阻抗感知电荷平衡方案更快、更省电。阻抗感知刺激器 ASIC 是使用 X-FAB 的 180 nm CMOS 工艺实现的。布局后仿真结果表明，在基于R _S和基于C _DL的电荷平衡下，电荷补偿后电极上与电极偏移电压的电压偏差减少至 2.64 mV 和 –1.39 mV，实现了良好的电荷平衡方案，分别。在 400 Hz 的刺激速率下，由于所提出的基于C _DL的电荷平衡器电路而产生的额外功率开销为 2.46 μW。