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Winols: A Large-Tiling Sparse Winograd CNN Accelerator on FPGAs
ACM Transactions on Architecture and Code Optimization ( IF 1.6 ) Pub Date : 2024-03-23 , DOI: 10.1145/3643682
Kunpeng Xie 1 , Ye Lu 1 , Xinyu He 1 , Dezhi Yi 1 , Huijuan Dong 1 , Yao Chen 2
Affiliation  

Convolutional Neural Networks (CNNs) can benefit from the computational reductions provided by the Winograd minimal filtering algorithm and weight pruning. However, harnessing the potential of both methods simultaneously introduces complexity in designing pruning algorithms and accelerators. Prior studies aimed to establish regular sparsity patterns in the Winograd domain, but they were primarily suited for small tiles, with domain transformation dictating the sparsity ratio. The irregularities in data access and domain transformation pose challenges in accelerator design, especially for larger Winograd tiles. This paper introduces “Winols,” an innovative algorithm-hardware co-design strategy that emphasizes the strengths of the large-tiling Winograd algorithm. Through a spatial-to-Winograd relevance degree evaluation, we extensively explore domain transformation and propose a cross-domain pruning technique that retains sparsity across both spatial and Winograd domains. To compress pruned weight matrices, we invent a relative column encoding scheme. We further design an FPGA-based accelerator for CNN models with large Winograd tiles and sparse matrix-vector operations. Evaluations indicate our pruning method achieves up to 80% weight tile sparsity in the Winograd domain without compromising accuracy. Our Winols accelerator outperforms dense accelerator by a factor of 31.7× in inference latency. When compared with prevailing sparse Winograd accelerators, Winols reduces latency by an average of 10.9×, and improves DSP and energy efficiencies by over 5.6× and 5.7×, respectively. When compared with the CPU and GPU platform, Winols accelerator with tile size 8× 8 achieves 24.6× and 2.84× energy efficiency improvements, respectively.



中文翻译:

Winols:FPGA 上的大型平铺稀疏 Winograd CNN 加速器

卷积神经网络 (CNN) 可以受益于 Winograd 最小过滤算法和权重修剪所提供的计算量减少。然而,同时利用这两种方法的潜力会带来设计修剪算法和加速器的复杂性。先前的研究旨在在 Winograd 域中建立规则的稀疏模式,但它们主要适用于小图块,域变换决定稀疏率。数据访问和域转换的不规则性给加速器设计带来了挑战,特别是对于较大的 Winograd 块。本文介绍了“Winols”,一种创新的算法-硬件协同设计策略,强调了大型平铺 Winograd 算法的优势。通过空间到 Winograd 的相关度评估,我们广泛探索了域转换,并提出了一种跨域修剪技术,该技术可以在空间和 Winograd 域之间保留稀疏性。为了压缩修剪后的权重矩阵,我们发明了一种相对列编码方案。我们进一步为具有大型 Winograd 瓦片和稀疏矩阵向量运算的 CNN 模型设计了一个基于 FPGA 的加速器。评估表明,我们的剪枝方法在 Winograd 域中实现了高达 80% 的权重切片稀疏度,且不影响准确性。我们的 Winols 加速器的推理延迟比密集加速器高出 31.7 倍。与流行的稀疏 Winograd 加速器相比,Winols 平均减少了 10.9 倍的延迟,并将 DSP 和能源效率分别提高了 5.6 倍和 5.7 倍以上。与CPU和GPU平台相比,瓦片尺寸为8×8的Winols加速器分别实现了24.6×和2.84×的能效提升。

更新日期:2024-03-23
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