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Growth of Ge on silicon-on-insulator wafer by plasma enhanced chemical vapor deposition and fabrication of microline photodetector using the Ge layer
Materials Science and Engineering: B ( IF 3.6 ) Pub Date : 2024-02-13 , DOI: 10.1016/j.mseb.2024.117242
Vishal Kumar Aggarwal , Subhamita Sengupta , Amaresh Dey , Ankita Ghatak , Barnali Ghosh , Sandip Bysakh , Achintya Singha , Debajyoti Das , A.K. Raychaudhuri

A Ge top layer of thickness was grown on the top Si of a silicon-on-insulator (SOI) wafer by plasma-enhanced chemical vapor deposition (PECVD) technique followed by rapid thermal annealing (RTA) makes this a GeSOI wafer. The top active Ge layer on RTA recrystallizes into a compact layer of Ge nanocrystals with lattice constants close to those of the Ge single crystal enabling device fabrication and a partially suspended Ge microline photodetector was fabricated that can show adequate photo gain. It was established through simulation that the partial suspension of the microline is necessary to isolate the microlines from the bulk of the wafer which inhibits carrier recombination by the underlying oxide layer.

中文翻译:

通过等离子体增强化学气相沉积在绝缘体硅晶圆上生长 Ge 以及使用 Ge 层制造微线光电探测器

通过等离子体增强化学气相沉积 (PECVD) 技术,在绝缘体上硅 (SOI) 晶圆的顶部 Si 上生长一定厚度的 Ge 顶层,然后进行快速热退火 (RTA),使其成为 GeSOI 晶圆。RTA 上的顶部活性 Ge 层再结晶成致密的 Ge 纳米晶体层,其晶格常数接近 Ge 单晶的晶格常数,从而实现器件制造,并且制造了部分悬浮的 Ge 微线光电探测器,可以显示足够的光电增益。通过模拟确定,微线的部分悬浮对于将微线与晶片主体隔离是必要的,这抑制了下面的氧化层的载流子复合。
更新日期:2024-02-13
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