We propose a low-complexity real-time equalization scheme for passive optical networks (PONs), which provides equalization with similar performance and ultra-low digital signal processing (DSP) resource usage compared to traditional schemes in experimental verification. With the help of the proposed scheme, FIR equalizers with multiple taps can be equivalent to equalizers with only two active taps, while other taps are quantified and stored, which can replace complex multiplications with simple shift operations. We introduce powers-of-two (PoT) non-uniform quantization technology to real-time transmission at the physical layer, which helps to save quantization precision and simplify multiplication complexity. We propose the rotational update mechanism (RUM), which solves the problem that the weight value after PoT non-uniform quantization is difficult to update. The proposed scheme with PoT and RUM greatly reduces the required hardware resources and power consumption, and the optical modules can use existing resources to support the additional number of taps required for higher baud rates. We verified the proposed scheme in decision-directed least mean square (DDLMS) equalization. The improved equalization scheme is implemented in the XCVU9P-FLGB2104-2-I Xilinx FPGA with a clock frequency of 230.4 MHz. The results show that the proposed equalization scheme can reduce up to 99.5% DSP resource usage compared to a normal DDLMS equalizer with 15 taps. We successfully realized 29.4912 Gbit/s PAM4 real-time IM/DD transmission over 25-km SSMF with a BER below the KP4 threshold utilizing the proposed DDLMS with PoT and RUM. The innovation of this paper lies in two aspects: (1) the introduction of the PoT quantization method in real-time equalization of PON transmission and (2) proposing RUM for real-time updating of weights in equalizers, which moves the quantification process from offline to real time, making the equalizers more robust for time-varying channels.

中文翻译：

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用于优化无源光网络均衡的 PoT 量化和旋转更新机制

我们提出了一种用于无源光网络（PON）的低复杂度实时均衡方案，与实验验证中的传统方案相比，该方案提供了具有相似性能和超低数字信号处理（DSP）资源使用的均衡。借助所提出的方案，具有多个抽头的FIR均衡器可以等效于只有两个活动抽头的均衡器，而其他抽头被量化和存储，这可以用简单的移位运算代替复杂的乘法。我们将二次方（PoT）非均匀量化技术引入到物理层的实时传输中，这有助于节省量化精度并简化乘法复杂度。我们提出旋转更新机制（RUM），解决了PoT非​​均匀量化后的权重值难以更新的问题。所提出的PoT和RUM方案大大减少了所需的硬件资源和功耗，并且光模块可以使用现有资源来支持更高波特率所需的额外抽头数量。我们在决策引导最小均方（DDLMS）均衡中验证了所提出的方案。改进的均衡方案在 XCVU9P-FLGB2104-2-I Xilinx FPGA 中实现，时钟频率为 230.4 MHz。结果表明，与具有 15 个抽头的普通 DDLMS 均衡器相比，所提出的均衡方案可减少高达 99.5% 的 DSP 资源使用。我们利用所提出的具有 PoT 和 RUM 的 DDLMS，成功实现了 25 公里 SSMF 上的 29.4912 Gbit/s PAM4 实时 IM/DD 传输，BER 低于 KP4 阈值。本文的创新点在于两个方面：（1）在PON传输的实时均衡中引入PoT量化方法；（2）提出RUM用于均衡器中权值的实时更新，将量化过程从离线到实时，使均衡器对于时变通道更加鲁棒。