In many fields including aerospace, automotive, and telecommunications, MathWorks’ MATLAB/Simulink is contemporary standard for model-based design. The strengths of Simulink are rapid design and algorithm exploration. Models created with Simulink are just functional. Therefore, designers cannot effortlessly consider a Simulink model’s architecture. As current architectures are optimized to run on multicore processors, software running on these processors needs to be parallelized in order to benefit from their natural performance. For instance, designers need to understand how a Simulink model could be parallelized and how an adequate multicore architecture is selected. This paper focuses on the dataflow-based parallelization of Simulink models and proposes a method based on dataflow to measure the performance of parallelized Simulink models running on multicore architectures. Throughout the parallelization process, the model is converted into a Hierarchical Synchronous DataFlow Graph (HSDFG) keeping its original semantics, and each composite node in the graph is flattened. Then, the graph is mapped and scheduled into a multicore architecture with the ultimate objective that minimizes the end-to-end latency. In the experiment of applying the proposed approach to a real Simulink model, latency of the parallelized model could be reduced successfully on a various multi-core architectures.

在航空航天、汽车和电信等许多领域，MathWorks 的 MATLAB/Simulink 是基于模型的设计的当代标准。Simulink 的优势在于快速设计和算法探索。使用 Simulink 创建的模型只是功能性的。因此，设计人员无法轻松考虑 Simulink 模型的架构。由于当前的架构经过优化以在多核处理器上运行，因此在这些处理器上运行的软件需要并行化才能从其自然性能中受益。例如，设计人员需要了解如何并行化 Simulink 模型以及如何选择适当的多核架构。本文重点研究了基于数据流的 Simulink 模型并行化，提出了一种基于数据流的方法来测量多核架构上运行的并行 Simulink 模型的性能。在整个并行化过程中，模型被转换为分层同步数据流图（HSDFG），保留其原始语义，并且图中的每个组合节点都被展平。然后，该图被映射并调度到多核架构中，最终目标是最大限度地减少端到端延迟。在将所提出的方法应用于真实 Simulink 模型的实验中，可以在各种多核架构上成功减少并行模型的延迟。