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Coexistence of analog and digital memristive behaviors in MoO3 based devices for artificial synaptic and logic display applications
Materials Today Chemistry ( IF 7.3 ) Pub Date : 2024-03-10 , DOI: 10.1016/j.mtchem.2024.101999
Jiajia Qin , Bai Sun , Shuangsuo Mao , Yusheng Yang , Mingnan Liu , Zhaowei Rao , Wei Lin , Yulong Yang , Yong Zhao

Inmemory logic operations and neuromorphic computing inspired by the brain based on memristors are promising computing modes that can improve computational efficiency and avoid additional power consumption. However, implementing these two functions within the memristor same cell is often limited by the flexible conversion between digital and analog memristive behaviors. In this work, a memristive device with Ag/MoO/Ti structure was developed using hydrothermal methods, which presents the evolution from capacitance-coupled memristive effect to self-rectifying non-zero crossing analog memristive behavior and then to digital memristive effect by adjusting the amplitude of applied voltage. Under low voltage region ( ≤ 1.2 V), the non-zero crossing analog memristive effect with self-rectifying behavior is mainly attributed to the potential barrier at the interface and built-in electric field, while the digital memristive effect under high voltage region ( ≥ 1.5 V) is mainly attributed to the formation and fracture of Ag conductive filaments (CFs). Moreover, the mechanism for the non-zero-crossing characteristic of device was proven by parallel connection of memristors and capacitors. Finally, the artificial synaptic and logic display functions were implemented using the as-prepared memristive unit. Therefore, this work provided guidance for understanding the non-zero-crossing memristive effect and the development of high-density multifunctional devices.

中文翻译:

用于人工突触和逻辑显示应用的基于 MoO3 的器件中模拟和数字忆阻行为的共存

受大脑启发的基于忆阻器的内存逻辑运算和神经形态计算是有前途的计算模式,可以提高计算效率并避免额外的功耗。然而,在忆阻器同一单元内实现这两个功能通常受到数字和模拟忆阻器行为之间的灵活转换的限制。在这项工作中,采用水热方法开发了一种Ag/MoO/Ti结构的忆阻器件,该器件呈现出从电容耦合忆阻效应到自校正非零交叉模拟忆阻行为,再到通过调节忆阻效应到数字忆阻效应的演变。施加电压的幅度。在低电压区(≤1.2 V)下,具有自整流行为的非过零模拟忆阻效应主要归因于界面势垒和内置电场,而在高电压区(≤1.2 V)下,数字忆阻效应主要归因于界面势垒和内建电场。 ≥ 1.5 V)主要归因于银导电丝(CF)的形成和断裂。此外,通过忆阻器和电容器的并联证明了器件非过零特性的机制。最后,利用所制备的忆阻单元实现了人工突触和逻辑显示功能。因此,这项工作为理解非零交叉忆阻效应和高密度多功能器件的开发提供了指导。
更新日期:2024-03-10
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