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Fabrication of High-Density Micro-Bump Arrays for 3D Integration of MEMS and CMOS
IEEJ Transactions on Electrical and Electronic Engineering ( IF 1 ) Pub Date : 2024-03-15 , DOI: 10.1002/tee.24058
Yunfan Shi 1 , Zilin Wang 1 , Rutian Huang 1 , Jin Kang 2 , Kai Zheng 2 , Weihai Bu 2 , Zheyao Wang 1, 3
Affiliation  

Cu-Sn transient-liquid-phase bonding has a limit in achieving small diameter/high-density bumps due to the extrusion of the melted Sn layer during bonding. This paper report a new method that can fabricate small diameter Cu-Sn bumps with 5 μm diameter and 25 μm pitch based on a new thermal reflow and pre-bonding method that enables solid-state Cu-Sn reaction for avoiding Sn extrusion. Using the new method, 3D integration of a 640 × 480 MEMS array on a CMOS circuit chip has been demonstrated. This method can be used in 3D integration of MEMS arrays and CMOS circuits such as micromirror arrays. © 2024 Institute of Electrical Engineer of Japan and Wiley Periodicals LLC.

中文翻译:

用于 MEMS 和 CMOS 3D 集成的高密度微凸块阵列的制造

由于接合过程中熔化的锡层的挤出,Cu-Sn 瞬态液相接合在实现小直径/高密度凸块方面存在限制。本文报道了一种新方法,可以基于新的热回流和预键合方法制造直径为 5 μm、间距为 25 μm 的小直径 Cu-Sn 凸块,该方法能够实现固态 Cu-Sn 反应,从而避免 Sn 挤出。使用新方法,已经演示了 CMOS 电路芯片上 640 × 480 MEMS 阵列的 3D 集成。该方法可用于MEMS阵列和CMOS电路(例如微镜阵列)的3D集成。 © 2024 日本电气工程师协会和 Wiley periodicals LLC。
更新日期:2024-03-15
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