In this study, the effect of implementing island growth in an AlN/Al0.1Ga0.9N superlattice on the structural properties of vertical GaN‐on‐Si(111) PIN‐structures is investigated. It is demonstrated by scanning electron microscopy (SEM) and atomic force microscopy (AFM) that islands are formed on‐top of V‐pits present in the AlN nucleation layer and that the island coalescence height can be controlled by the growth temperature. Defect selective etching analyses confirm a noteworthy reduction in the threading dislocation density (TDD), which diminishes from 1.2 × 109 cm−2 ± 7.5 × 107 cm−2 to 8.5 × 108 cm−2 ± 7.3 ×107 cm−2 as the island coalescence height increases from ≈160 nm to ≈450 nm, achieved by increasing the growth temperature. Cross‐sectional transmission electron microscopy (TEM) shows that island growth is particularly favorable for the reduction of a‐type dislocations. As a consequence of the significant reduction of a‐type dislocations in the buffer, stress relaxation during the GaN film growth is reduced, which is supported by in situ wafer curvature measurements and high‐resolution X‐ray diffraction (XRD). Owing to the optimized island growth conditions, thick and crack‐free GaN layers on Si(111) substrates are obtained with an absolute wafer bow of <50 μm.

中文翻译：

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利用超晶格缓冲器中的岛生长实现电力电子厚 GaN-on-Si(111) PIN 结构

在本研究中，在 AlN/Al 中实施岛生长的效果0.1嘎0.9研究了 N 超晶格对垂直 GaN-on-Si(111) PIN 结构的结构特性的影响。扫描电子显微镜（SEM）和原子力显微镜（AFM）表明，AlN成核层中的V坑顶部形成了岛，并且岛的聚结高度可以通过生长温度来控制。缺陷选择性蚀刻分析证实，穿透位错密度 (TDD) 显着降低，从 1.2 × 109厘米−2±7.5×107厘米−2至 8.5 × 108厘米−2±7.3×107厘米−2随着岛聚结高度从约 160 nm 增加到约 450 nm，这是通过提高生长温度来实现的。横截面透射电子显微镜（TEM）显示岛状生长特别有利于减少a型位错。由于缓冲区中 a 型位错的显着减少，GaN 薄膜生长过程中的应力松弛减少，这一点得到了原位晶圆曲率测量和高分辨率 X 射线衍射 (XRD) 的支持。由于优化的岛生长条件，在 Si(111) 衬底上获得了厚且无裂纹的 GaN 层，且绝对晶圆弓度 <50 μm。