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Artificial Neural Network Based on Memristive Circuit for High-Speed Equalization
IEEE Transactions on Circuits and Systems I: Regular Papers ( IF 5.1 ) Pub Date : 2024-03-18 , DOI: 10.1109/tcsi.2023.3348990
Zhang Luo 1 , Sichun Du 2 , Zedi Zhang 2 , Fangxu Lv 1 , Qinghui Hong 2 , Mingche Lai 1
Affiliation  

The limitations of traditional von Neumann architectures and digital computing are the bottlenecks for high-speed signal processing capabilities, not to mention the explosion of information growth. To tackle this challenge, this paper proposes an artificial neural network (ANN) equalizer based on the memristor for high-speed channel transmission at 112Gbps with 4-level pulse amplitude modulation (PAM4). To implement the PAM4 signal decision circuit based on the softmax algorithm, a comparator is used to make binary decisions for each output, and the only high-level output is further selected for the decision-making. The simulations on the PSPICE platform reveal that the number of input taps and the location of the main tap have the greatest impact on bit error rate (BER) performance. With optimal parameters, the circuit can achieve an impressive BER performance as low as 3.45E-6. To the best of our knowledge, this is the first implementation of channel equalization using memristive circuits, providing a valuable reference for analog circuit implementations of neural network equalizers.

中文翻译:

基于忆阻电路的人工神经网络高速均衡

传统冯诺依曼架构和数字计算的局限性是高速信号处理能力的瓶颈,更不用说信息的爆炸式增长。为了应对这一挑战,本文提出了一种基于忆阻器的人工神经网络 (ANN) 均衡器,用于采用 4 级脉冲幅度调制 (PAM4) 的 112Gbps 高速通道传输。实现基于softmax算法的PAM4信号判决电路,利用比较器对每个输出进行二值判决,并进一步选择唯一的高电平输出进行判决。 PSPICE 平台上的仿真表明,输入抽头的数量和主抽头的位置对误码率 (BER) 性能影响最大。通过最佳参数,该电路可以实现低至 3.45E-6 的令人印象深刻的 BER 性能。据我们所知,这是首次使用忆阻电路实现通道均衡,为神经网络均衡器的模拟电路实现提供了有价值的参考。
更新日期:2024-03-18
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