In this work, a high-speed and energy-efficient comparator-based N ear- S ensor L ocal B inary P attern accelerator architecture (NS-LBP) is proposed to execute a novel local binary pattern deep neural network. First, inspired by recent LBP networks, we design an approximate, hardware-oriented, and multiply-accumulate (MAC)-free network named Ap-LBP for efficient feature extraction, further reducing the computation complexity. Then, we develop NS-LBP as a processing-in-SRAM unit and a parallel in-memory LBP algorithm to process images near the sensor in a cache, remarkably reducing the power consumption of data transmission to an off-chip processor. Our circuit-to-application co-simulation results on MNIST and SVHN datasets demonstrate minor accuracy degradation compared to baseline CNN and LBP-network models, while NS-LBP achieves 1.25 GHz and an energy-efficiency of 37.4 TOPS/W. NS-LBP reduces energy consumption by 2.2× and execution time by a factor of 4× compared to the best recent LBP-based networks.

中文翻译：

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用于近似局部二进制模式网络的近传感器处理加速器

在这项工作中，基于高速且节能的比较器靠近- 传感器当地的二进制提出了模式加速器架构（NS-LBP）来执行一种新颖的局部二进制模式深度神经网络。首先，受最近的 LBP 网络的启发，我们设计了一种近似的、面向硬件的、无乘法累加（MAC）的网络，名为 Ap-LBP，用于高效的特征提取，进一步降低了计算复杂度。然后，我们开发了 NS-LBP 作为 SRAM 中的处理单元和并行内存中 LBP 算法，以在缓存中处理传感器附近的图像，从而显着降低向片外处理器传输数据的功耗。我们在 MNIST 和 SVHN 数据集上的电路到应用联合仿真结果表明，与基线 CNN 和 LBP 网络模型相比，精度略有下降，而 NS-LBP 实现了 1.25 GHz 和 37.4 TOPS/W 的能效。与最近最好的基于 LBP 的网络相比，NS-LBP 将能耗降低了 2.2 倍，执行时间降低了 4 倍。