A low-power 23–25.5-GHz frequency-modulated continuous wave (FMCW) radar transceiver, implemented in 65-nm CMOS, is proposed for artificial intelligence-Internet of Things (AIOT) applications in this article. The transceiver integrates a frequency synthesizer, a power amplifier (PA), a low noise amplifier (LNA), I/Q mixers, a quadrature all-pass filter (QAF)-based local oscillator (LO) generator, and an analog baseband (ABB). A current-sharing LNA using $g_{m} $ -boosting three-turn coupling transformers and an LO generator using injection locking technique are employed to render high gain with low power consumption. Furthermore, a Class-B mixer with bulk injection (BI) technique is proposed to alleviate LO signal strength requirement with low power while enhancing conversion gain (CG) and linearity. Measurements demonstrate that the transceiver demonstrates a peak transmitter (TX) output power of 12.6 dBm with 28.5% efficiency, a receiver (RX) CG of 54.2 dB, a minimum RX NFdsb of 5.7 dB @ 1.6-MHz offset, an RX IIP3 of −24 dBm and an RX IP1dB of −34.5 dBm @42-dB gain across 23–25.5 GHz from a 1-V supply. To further reduce power consumption, the transceiver can work under a low supply voltage of 0.75 V and can still deliver a 9.1-dBm TX output power with 19.2% efficiency, a 49.6-dB RX CG, a 7.9-dB RX NFdsb @1.6-MHz offset, a −29.1-dBm RX IIP3, and a −41.7-dBm RX IP1dB @ 42-dB gain across 23.2–24.8 GHz. The measured phase noise is −102 dBc/Hz at 1-MHz offset at 23.4 GHz. The root-mean-square (rms) frequency error is 120 kHz (0.12%) for a sawtooth chirp with 100-MHz bandwidth and 1-MHz/s chirp-rate. With two external 20-dBi horn antennas, the radar demonstrates a 15.6-cm range resolution with 960-MHz modulation bandwidth in 20-m indoor tests. The entire transceiver occupies a chip area of $2.3\times3.7$ mm2 including pads and consumes 155.9 mW from a 1-V supply, and a 103.6 mW from a 0.75-V supply.

中文翻译：

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适用于 AIOT 应用的采用 65 nm CMOS 的低功耗 23–25.5 GHz FMCW 雷达收发器

本文提出了一种采用 65 nm CMOS 实现的低功耗 23–25.5 GHz 调频连续波 (FMCW) 雷达收发器，用于人工智能物联网 (AIOT) 应用。该收发器集成了频率合成器、功率放大器 (PA)、低噪声放大器 (LNA)、I/Q 混频器、基于正交全通滤波器 (QAF) 的本振 (LO) 发生器和模拟基带 ( ABB）。均流 LNA 使用 $g_{米} $ -采用升压三匝耦合变压器和采用注入锁定技术的LO发生器，以低功耗实现高增益。此外，还提出了一种采用批量注入 (BI) 技术的 B 类混频器，以低功率减轻 LO 信号强度要求，同时增强转换增益 (CG) 和线性度。测量表明，收发器的峰值发射器 (TX) 输出功率为 12.6 dBm，效率为 28.5%，接收器 (RX) CG 为 54.2 dB，最小 RX NFdsb 为 5.7 dB @ 1.6 MHz 偏移，RX IIP3 为 - 24 dBm 和 −34.5 dBm 的 RX IP1dB（采用 1 V 电源，在 23–25.5 GHz 范围内@42 dB 增益）。为了进一步降低功耗，收发器可以在 0.75V 的低电源电压下工作，并且仍然可以以 19.2% 的效率提供 9.1dBm TX 输出功率、49.6dB RX CG、7.9dB RX NFdsb @1.6- MHz 偏移、−29.1dBm RX IIP3 和−41.7dBm RX IP1dB（在 23.2–24.8 GHz 范围内增益为 42dB）。在 23.4 GHz、1 MHz 偏移下测得的相位噪声为 −102 dBc/Hz。对于具有 100 MHz 带宽和 1 MHz/s 线性调频速率的锯齿线性调频，均方根 (rms) 频率误差为 120 kHz (0.12%)。该雷达配备两个外部 20dBi 喇叭天线，在 20 米室内测试中显示出 15.6 厘米距离分辨率和 960 MHz 调制带宽。整个收发器占用芯片面积 $2.3\次3.7$mm2（包括焊盘）在 1V 电源下功耗为 155.9mW，在 0.75V 电源下功耗为 103.6mW。