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A neurostimulation network to help memory
Nature Electronics ( IF 34.3 ) Pub Date : 2024-03-22 , DOI: 10.1038/s41928-024-01143-x
Katharina Zeissler

The researchers — who are based at the University of Toronto, Ohio State University and the University of Pennsylvania — developed acceleration modules to detect the amplitude and phase of brain rhythms with short latency. Their chipset network consists of three star-connected neural interface nodes surgically implanted near the target brain areas, which are connected to a central node placed under the skin above the skull. The team used the chipsets to study the memory functions of freely behaving monkeys in awake and asleep states. The measured data were transmitted from the chipset network for offline analysis using an ultra-wideband transceiver, with a data rate of 67 Mb s–1 and a bit error rate of 10–5 over a distance of 1.5 m.

Original reference: In Proc. 2024 IEEE Int. Solid-State Circuits Conference (in the press); https://isscc.org



中文翻译:

帮助记忆的神经刺激网络

来自多伦多大学、俄亥俄州立大学和宾夕法尼亚大学的研究人员开发了加速模块,以短延迟检测大脑节律的幅度和相位。他们的芯片组网络由三个星形连接的神经接口节点组成,这些神经接口节点通过手术植入目标大脑区域附近,这些节点连接到位于头骨上方皮肤下的中央节点。研究小组使用芯片组研究了活动自如的猴子在清醒和睡眠状态下的记忆功能。使用超宽带收发器从芯片组网络传输测量数据进行离线分析,在 1.5 m 的距离内数据速率为 67 Mb s –1,误码率为 10 –5 。

原始参考: Proc . 2024 IEEE 国际。固态电路会议(新闻中); https://isscc.org

更新日期:2024-03-23
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