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Investigation of Prepulse of SiC Drift Step Recovery Diode in Fast Interruption Process
IEEE Transactions on Electron Devices ( IF 3.1 ) Pub Date : 2024-03-28 , DOI: 10.1109/ted.2024.3379959
Xiaoxue Yan 1 , Lin Liang 1 , Zewei Yang 1 , Hai Shang 1
Affiliation  

The output pulse voltage with a front of high dV/dt is an important feature in the application of silicon carbide (SiC) drift step recovery diodes (DSRDs). However, the presence of prepulse leads to a deformation of the pulse front, reducing its mean rising rate. The influence factors and mechanisms of prepulse of 4H-SiC DSRD are investigated in this article. $\eta $ is proposed to evaluate the prepulse characteristics, which is defined as the ratio of the prepulse amplitude ( ${V}_{\text {pre}}{)}$ to the peak output voltage ( ${V}_{\text {peak}}{)}$ . A good output characteristic should have a low $\eta $ . The experimental results indicate that the device area ( ${S}{)}$ , power supply voltage ( ${V}_{\text {cc}}{)}$ , and load resistance ( ${R}_{\text {load}}{)}$ have a significant impact on the prepulse. Through Sentaurus TCAD simulation, the effects of the three factors on prepulse were further obtained over a larger range of variations. The simulation results agree with the experimental data well. The results indicate that ${V}_{\text {pre}}$ does not depend on ${V}_{\text {peak}}$ . Increasing ${S}$ , ${R}_{\text {load}}$ , and ${V}_{\text {cc}}$ can all reduce $\eta $ , but only an increase in ${S}$ can reduce ${V}_{\text {pre}}$ among the three factors. From the perspective of prepulse characteristics, SiC DSRDs are more suitable for application at higher voltage conditions rather than lower voltage, as there is often a lower $\eta $ under higher voltage conditions.

中文翻译:

快速中断过程中SiC漂移阶跃恢复二极管预脉冲的研究

具有高 dV/dt 前沿的输出脉冲电压是碳化硅 (SiC) 漂移阶跃恢复二极管 (DSRD) 应用中的重要特征。然而,预脉冲的存在会导致脉冲前沿变形,降低其平均上升率。本文研究了4H-SiC DSRD预脉冲的影响因素和机制。 $\eta$提出了评估预脉冲特性的方法,其定义为预脉冲幅度的比率( ${V}_{\text {前}}{)}$到峰值输出电压( ${V}_{\text {峰值}}{)}$ 。良好的输出特性应具有低 $\eta$ 。实验结果表明,器件面积( ${S}{)}$ ,电源电压( ${V}_{\text {cc}}{)}$ ,和负载电阻( ${R}_{\text {加载}}{)}$对前脉冲有显着影响。通过Sentaurus TCAD仿真,在更大的变化范围内进一步获得了这三个因素对预脉冲的影响。模拟结果与实验数据吻合良好。结果表明 ${V}_{\text {pre}}$不依赖于 ${V}_{\text {峰值}}$ 。增加 ${S}$ , ${R}_{\text {加载}}$ , 和 ${V}_{\text {cc}}$都可以减少 $\eta$ ,但只增加了 ${S}$可以减少 ${V}_{\text {pre}}$三个因素之中。从预脉冲特性的角度来看,SiC DSRD 更适合在较高电压条件下应用而不是在较低电压条件下应用,因为通常存在较低的电压条件。 $\eta$在较高电压条件下。
更新日期:2024-03-28
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