In lattice-based cryptography, Ring Learning with Errors (RLWE) is a computationally hard cryptographic problem, comprising three basic mechanisms i.e., key generation, encryption, and decryption. Binary Ring Learning with Error (BRLWE), a new variant of RLWE has been proposed recently to reduce the key size and computational complexity compared to previous RLWE-based schemes. Based on this BRLWE scheme, efficient hardware architectures have been obtained in recent works for lightweight applications. The key operation involved in this scheme is , where and are integer polynomials and is a binary polynomial. This paper proposes an efficient hardware architecture for BRLWE-based scheme targeted for lightweight applications. The architecture computes the arithmetic operation , which includes polynomial multiplication and addition over the polynomial ring . The proposed architecture is applied in two conditions, fixed and variable values of . Experimental results show the architecture proposed has 50% less Area-Delay Product (ADP) and 20% less Power-Delay Product (PDP) compared to the recently reported work for .

中文翻译：

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CNC：基于 Binary Ring-LWE 的 PQC 的轻量级架构

在基于格的​​密码学中，带错误的环学习（RLWE）是一个计算困难的密码问题，包括密钥生成、加密和解密三种基本机制。带误差的二元环学习（BRLWE）是最近提出的 RLWE 的一种新变体，与之前基于 RLWE 的方案相比，它可以减少密钥大小和计算复杂度。基于这种 BRLWE 方案，在最近的轻量级应用工作中获得了高效的硬件架构。该方案涉及的关键运算是 ，其中 和 是整数多项式，是二元多项式。本文提出了一种针对轻量级应用的基于 BRLWE 的方案的高效硬件架构。该架构计算算术运算，其中包括多项式乘法和多项式环上的加法。所提出的架构适用于两种情况，即 的固定值和可变值。实验结果表明，与最近报道的 .