The rapid growth of data‐intensive applications has significantly heightened the concerns about power consumption in current computing systems. From this perspective, there have been substantial efforts to implement ultra‐low power systems by integrating nanoelectromechanical non‐volatile switches (NEM‐NVS) with near‐zero leakage current into standard complementary metal‐oxide‐semiconductor (CMOS) circuits. To practically harness the potential of the NEM‐NVS, it is imperative to achieve high performance, such as low voltage, high on/off ratio, and high reliability, while simultaneously ensuring wafer‐scale CMOS compatibility. However, achieving these requirements is still challenging, primarily due to their electrostatic operation, in‐plane electrode configuration, and conventional fabrication methods. Here, an electro‐thermally actuated nanomechanical non‐volatile switch (ETAN‐NVS) with an out‐of‐plane electrode configuration along with an 8‐inch wafer‐scale CMOS‐compatible fabrication method is reported. By introducing the electrothermal mechanism into a vertically actuated buckling nanostructure, the fabricated ETAN‐NVS attains CMOS‐level voltage (<2.4 V), a high on/off ratio (>108), and exceptional reliability (>1300 cycles). Moreover, a successful wafer‐scale demonstration of the ETAN‐NVS using only a CMOS‐compatible process paves the way for 3D integration with CMOS logic.

中文翻译：

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具有平面外电极配置的晶圆级 CMOS 兼容电热驱动纳米机械非易失性开关

数据密集型应用程序的快速增长显着加剧了对当前计算系统功耗的担忧。从这个角度来看，通过将具有接近零泄漏电流的纳米机电非易失性开关（NEM-NVS）集成到标准互补金属氧化物半导体（CMOS）电路中，人们已经做出了大量努力来实现超低功耗系统。为了实际发挥 NEM-NVS 的潜力，必须实现高性能，例如低电压、高开/关比和高可靠性，同时确保晶圆级 CMOS 兼容性。然而，实现这些要求仍然具有挑战性，这主要是由于它们的静电操作、面内电极配置和传统的制造方法。本文报道了一种电热驱动纳米机械非易失性开关（ETAN-NVS），具有平面外电极配置以及 8 英寸晶圆级 CMOS 兼容制造方法。通过将电热机制引入垂直驱动的屈曲纳米结构，所制造的 ETAN-NVS 获得了 CMOS 级电压（<2.4 V）、高开/关比（>108）和卓越的可靠性（>1300 次循环）。此外，仅使用 CMOS 兼容工艺对 ETAN-NVS 进行了成功的晶圆级演示，为 CMOS 逻辑的 3D 集成铺平了道路。