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Asymmetric and Double-Layered Gate-All-Around Structures of 1T-DRAM for Sensing Margin and Retention Improvement
IEEE Transactions on Electron Devices ( IF 3.1 ) Pub Date : 2024-04-10 , DOI: 10.1109/ted.2024.3385394
Semyung Kwon 1 , Ilgu Yun 1
Affiliation  



中文翻译:

1T-DRAM 的非对称双层环栅结构,用于提高感测裕度和保持力

更新日期:2024-04-10
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