In this article, the failure mechanism and improved designs of silicon carbide (SiC) metal–oxide–semiconductor field-effect transistor (MOSFET) under high dV/dt switching condition were studied. Two typical structures of the main junction region were studied, and an improved new structure was proposed. Since the space charge regions of cell, termination, and main junction were charged and discharged, respectively, the corresponding transient current will generate a transient voltage and, hence, form the additional transient electric field to the gate oxide. In the first structure, the transient electric field spike appeared at the corners of the gate oxide layer and the field oxide layer. This typical failure mode was considered to be the degradation cause of gate oxide. In the second structure, all the transient electric fields of the oxide layers, including the part at the corner between gate oxide and field oxide layer maintained at a high level, and the typical failure mode were found to be device burnout. To improve the reliability, a novel main junction structure with an isolation structure design was proposed. It could successfully inhibit the transient high electric field when the device operates at dV/dt above 100 V/ns. The TCAD simulation results validated the detailed physical mechanism and showed that the transient electric field was significantly reduced by splitting the transient currents by the proposed main junction structure.

中文翻译：

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SiC MOSFET 开关行为的 dV/dt 鲁棒性和新颖的主结区设计

本文研究了碳化硅（SiC）金属氧化物半导体场效应晶体管（MOSFET）在高 dV/dt 开关条件下的失效机制和改进设计。对主结区的两种典型结构进行了研究，提出了一种改进的新结构。由于单元、终端和主结的空间电荷区分别被充电和放电，相应的瞬态电流将产生瞬态电压，从而对栅极氧化物形成附加的瞬态电场。在第一种结构中，瞬态电场尖峰出现在栅氧化层和场氧化层的拐角处。这种典型的失效模式被认为是栅极氧化物的退化原因。在第二种结构中，所有氧化层的瞬态电场，包括栅氧化层和场氧化层之间的拐角部分都保持在高水平，典型的失效模式是器件烧毁。为了提高可靠性，提出了一种具有隔离结构设计的新型主结结构。当器件工作在 100 V/ns 以上的 dV/dt 时，它可以成功抑制瞬态高电场。 TCAD 仿真结果验证了详细的物理机制，并表明通过所提出的主结结构分割瞬态电流，瞬态电场显着降低。