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On the impact of hardware-related events on the execution of real-time programs

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Abstract

Estimating safe upper bounds on execution times of programs is required in the design of predictable real-time systems. When multi-core, instruction pipeline, branch prediction, or cache memory are in place, due to the considerable complexity traditional static timing analysis faces, measurement-based timing analysis (MBTA) is a more tractable option. MBTA estimates upper bounds on execution times using data measured under the execution of representative execution scenarios. In this context, understanding how hardware-related events affect the executing program under analysis brings about useful information for MBTA. This paper contributes to this need by modeling the execution behavior of programs in function of hardware-related events. More specifically, for a program under analysis, we show that the number of cycles per executed instruction can be correlated to hardware-related event occurrences. We apply our modeling methodology to two architectures, ARMv7 Cortex-M4 and Cortex-A53. While all hardware events can be monitored at once in the former, the latter allows simultaneous monitoring of up to 6 out of 59 events. We then describe a method to select the most relevant hardware events that affect the execution of a program under analysis. These events are then used to model the program behavior via machine learning techniques under different execution scenarios. The effectiveness of this method is evaluated by extensive experiments. Obtained results revealed prediction errors below 20%, showing that the chosen events can largely explain the execution behavior of programs.

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Data availibility

All data generated and analyzed during the study are available upon request.

Notes

  1. Although it is possible to monitor more than seven events in Raspberry Pi, this can only be done by multiplexing the registers during the measurements, which leads to excessive measurement errors.

  2. Employing this strategy in preliminary stages of our work led to unsatisfactory results.

  3. More details on the KDBench are available at https://team.inria.fr/kopernic/kdbench/.

  4. https://github.com/tadeunca/daem_journal/ .

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Funding

This work was partially funded by CAPES (Brazil), Grant No. 001, through the Inria-UFBA Associated Teams Program under the Kepler project, by the ANRT FR Joint CIFRE Inria and StatInf, CIFRE Grant No. 1072/2020, and by BPI France under the FR PSPC-regions - STARTREC 2021 project.

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Authors and Affiliations

  1. Institute of Computing, Federal University of Bahia, Salvador, Brazil

    Tadeu Nogueira C. Andrade & George Lima

  2. Institute of Mathematics and Statistics, Federal University of Bahia, Salvador, Brazil

    Veronica Maria Cadena Lima

  3. Bahian Federal Institute of Education, Science and Technology, Uruçuca, Bahia, Brazil

    Tadeu Nogueira C. Andrade

  4. StatInf, Paris, France

    Slim Bem-Amor & Ismail Hawila

  5. Kopernic, Inria, Paris, France

    Slim Bem-Amor, Ismail Hawila & Liliana Cucu-Grosjean

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  1. Tadeu Nogueira C. Andrade
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Contributions

I, TNCA, wrote the main text of the manuscript under the supervision of GL and VL. IH and SB-A were responsible for monitoring hardware events in the Cortexv7-m4 architecture, contributing to section 4.1 under the supervision of LC-G. All authors reviewed and contributed to the manuscript.

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Correspondence to Tadeu Nogueira C. Andrade or George Lima.

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Andrade, T.N.C., Lima, G., Lima, V.M.C. et al. On the impact of hardware-related events on the execution of real-time programs. Des Autom Embed Syst 27, 275–302 (2023). https://doi.org/10.1007/s10617-023-09281-9

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