8.7 A/700 V β-Ga₂O₃ Schottky barrier diode demonstrated by oxygen annealing combined with self-aligned mesa termination

β-Ga₂O₃ has become a candidate material for the next generation of power devices due to its ultrawide bandgap (4.8 eV), high critical electric breakdown field (8 MV cm⁻¹), high Baliga's figure of merit (3444) and low-cost of single crystal substrates. ^1,2) In recent years, the commercial application of halide vapor phase epitaxy (HVPE) technology ³⁾ and multiple developments of device structures have greatly accelerated the development of β-Ga₂O₃ power devices.

Numerous reports have demonstrated that the performance can be improved by edge terminations that effectively reduce the edge electric field (e.g., high-resistivity region, ⁴⁾ field-plated trench MOS ⁵⁾ and mesa termination ⁶⁾). Mesa termination has been widely studied as an effective termination to modulate the edge electric field, the in situ annealing dry etching process is especially beneficial for reducing the sidewall surface charge and significantly improves the device breakdown voltage. ⁶⁾ However, the performance of the device with termination is limited by β-Ga₂O₃ epitaxial surface defects and possible damage caused by chemical mechanical polishing. Fortunately, the oxygen annealing (OA) process is conducive to improving the surface homogeneity of the HVPE layer, which can effectively reduce the oxygen vacancies and defects. ⁷⁾

In this work, we demonstrate β-Ga₂O₃ SBDs with obvious improvement in performance by combining OA and anodic self-aligned mesa termination (SAMT) processes. The breakdown voltage (V_br) significantly increased from 845 V to 1532 V while the forward current of devices decreased slightly after OA at 400 °C for 30 min with mesa termination. Besides this, a large device with a 3 × 3 mm² anode size was fabricated, achieving a high forward current of 8.7 A@2 V and V_br > 700 V.

Figure 1(a) shows the cross-section schematic of the β-Ga₂O₃ SBDs, including the control SBD (left), the SBD with OA (middle) and the SBD with mesa termination after OA (right). The devices were fabricated on a 10 μm thick lightly Si doped β-Ga₂O₃ drift layer, which was grown by HVPE on a Sn-doped β-Ga₂O₃ substrate with a carrier concentration of 5 × 10¹⁸ cm⁻³ by Novel Crystal Technology, Inc., Japan. The wafer preparation started with organic and piranha solution cleaning. After cleaning in de-ionized water, different thermal oxidation temperatures of 200 °C, 400 °C, 600 °C and 800 °C for 30 min were taken, separately. Then, dry etching Inductively Coupled Plasma (ICP) was performed on the above samples (including the control sample) to eliminate the increase in ohmic contact resistance caused by thermal oxidation annealing. The Ti (100 nm)/Au (150 nm) metals were then deposited on the sample backside by electron-beam evaporation. After that, the patterned circular Schottky anode with a radius of 100 μm consisting of a Ni (100 nm)/Au (150 nm) metal stack were fabricated by evaporation and lift-off, which was also used as the hard mask for the self-aligned etching. Finally, the devices were etched in ICP 180 system to form the mesa termination, and the ICP parameters were the same as our previous work. ⁶⁾ Large area SBDs (3 × 3 mm²) were also fabricated in the process. The difference is that the anode was finally thickened to 1.5 μm through a shadow mask to facilitate the packaging process.

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The Atomic Force Microscope (AFM) images of the epitaxial layer before and after OA at 400 °C for 30 min are presented in Fig. 1(b). The RMS decreases from 0.435 nm to 0.245 nm in a 2 × 2 μm² area after annealing and has clear atomic step. Figure 1(c) displays the scanning electron microscopy (SEM) cross-section imaging of the SAMT device with OA, which has an etching depth of approximately 350 nm and an etching angle of 90°.

Figure 2(a) displays the carrier concentration (N_d-N_a) extracted by capacitance-voltage (C-V) measurements of devices before and after annealing with different temperatures at 100 kHz. Equation (1) expresses the relationship between the measured capacitance and the N_d-N_a of the epitaxial layer.

$$\begin{eqnarray}&&{N}_{{\rm{d}}}-{N}_{{\rm{a}}}=\frac{2}{q{\varepsilon }_{s}{\varepsilon }_{0}{A}^{2}}\frac{{\rm{d}}V}{{\rm{d}}(1/{C}^{2})},\end{eqnarray} \tag{ 1 }$$

where q, ${\varepsilon }_{s},$ ${\varepsilon }_{0},$ A is the electron charge, the relative dielectric constant, the vacuum dielectric constant and the anode area, respectively. Annealing caused retraction of the N_d-N_a profile approximately 20 nm deeper into the epi-layer and a decrease from 1.35 × 10¹⁶ cm⁻³ to 1.22 × 10¹⁶ cm⁻³ indicating compensation of the surface charge. ⁸⁾ Figure 2(b) shows the linear plot of the forward I-V characteristics and the extracted differential specific on-resistance (R_on,sp) after annealing at different temperatures. OA caused the current density at 2 V to decrease from 234 A cm⁻² (4.12 mΩ·cm²) to 200 A cm⁻² (4.62 mΩ·cm²), 196 A cm⁻² (4.89 mΩ·cm²), 183 A cm⁻² (4.93 mΩ·cm²) and 191 A cm⁻² (4.71 mΩ·cm²) at annealing temperature of 200 °C, 400 °C, 600 °C and 800 °C, respectively. This is related to the decrease in carrier concentration after annealing. ⁹⁾ Moreover, the turn-on voltage (V_on) increased after OA of the device. It is due to the increase of the Schottky barrier height, which increased from 1.06 eV (control) to 1.07 eV, 1.08 eV, 1.16 eV, 1.14 eV, respectively. The Schottky barrier height was measured according to Eq. (2):

$$\begin{eqnarray}&&q{\phi }_{B}={kT}\mathrm{ln}\left(\frac{{A}^{* }{T}^{2}}{{J}_{s}}\right),\end{eqnarray} \tag{ 2 }$$

where q, Js, A*, k, T is the electron charge, the saturation current, the effective Richardson's constant (A* for Ga₂O₃ to be 41.1 A·cm⁻²·K⁻²), the Boltzmann's constant, and the temperature, respectively. Figure 2(c) presents the log-scale measured reverse J-V curves of different devices at 200 V. It can be seen that the reverse leakage density decreases from at least 10⁻⁵ A cm⁻² to 10⁻⁷ A cm⁻² after annealing.

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Figure 3(a) shows the statistical plots of the R_on,sp extracted from forward current density and the V_br of devices with and without OA. As the annealing temperature increased, the R_on,sp increased further, but there is a tendency to saturate after the temperature reaches 400 °C. Meanwhile, the V_br reached the highest at 400 °C. The highest Power Figure of Merit (PFOM) values without and with different annealing temperatures are 87 MW cm⁻² (control), 105 MW cm⁻², 173 MW cm⁻², 109 MW cm⁻² and 112 MW cm⁻² at annealing temperature of 200 °C, 400 °C, 600 °C and 800 °C, respectively. Therefore, 400 °C is the optimum annealing temperature for β-Ga₂O₃ SBDs. It is worth mentioning that the device uniformity of both the R_on,sp and breakdown voltage has been significantly improved after OA.

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The reverse breakdown I-V characteristics with different annealing temperatures are shown in Fig. 4. The V_br values are 572 V for the control SBDs and 711 V, 845 V, 691 V and 744 V in ascending order of annealing temperature without mesa termination [Fig. 4(a)]. After 350 nm etching, the V_br increased to 894 V, 1434 V, 1532 V, 1560 V and 1524 V, which demonstrated the superior performance of the mesa termination [Fig. 4(b)]. It is worth mentioning that the device with OA has a higher V_br improvement, which can be explained by the repair effect of OA on surface defects and the reduction of reverse leakage current in the HVPE layer.

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Figure 5 shows the typical optical micrographs of the (001) β-Ga₂O₃ samples without and with annealing at 400 °C after chemical etching by Potassium hydroxide (KOH) at 80 °C for 1 h. ¹⁰⁾ The test samples were obtained from the same one sample (5 × 7.5 mm²). It was divided into two parts of 2.5 × 7.5 mm² in size. Three 1 × 2 mm² areas were selected at equal intervals from top to bottom to observe the density of etch pits for each sample. The density without annealing varied from 6700 cm⁻² to 2850 cm⁻² and 2700 cm⁻², but decreased to 6300 cm⁻², 900 cm⁻² and 1300 cm⁻² after OA at 400 °C for 30 min respectively. Besides this, the length and depth of the etch pits were significantly reduced. The reduced pit density on the sample surface helped to reduce the reverse leakage because the electric field tends to concentrate at the bottom of the etch pits, thus minimizing the reverse leakage of the device. ¹¹⁾ The reduction in the pit density and size due to OA may be attributed to the capacity of oxygen groups in an oxygen atmosphere to expedite the adsorption or desorption of surface atoms, thus facilitating surface reconstruction. ¹²⁾ This can correspond to the AFM results in Fig. 1(b). We also prepared samples annealed in an Ar atmosphere at 400 °C for comparison. However, the density of etch pits did not decrease, indicating that oxygen is necessary to reduce the density of etch pits for β-Ga₂O₃.

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Figure 6 presents the I-V characteristics before and after the etching of devices at different annealing temperatures. After 350 nm of etching, the forward current density decreases slightly by 3.8 A cm⁻², 1.9 A cm⁻², 9.3 A cm⁻², and 1.9 A cm⁻² at 2 V with annealing at different temperatures from 200 °C to 800 °C. The difference may be caused by the negative interface charges induced by etching and the decrease in the spreading current. ¹³⁾ The forward turn-on voltage also decreases after that because of the reduction of the interface state which is influenced by the temperature introduced during the in situ annealing dry etching process. ⁶⁾

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According to the above results, the OA treatment at 400 °C is the optimum annealing temperature for β-Ga₂O₃ SBDs, therefore 400 °C is adopted as the annealing temperature for large area device fabrication. We specially prepared devices via the same fabrication process to verify the feasibility of large current β-Ga₂O₃ diodes with this design. We achieved a high performance large area device with a Schottky anode area of 3 × 3 mm². After thickening the device anode electrode, we used a TO-254 shell for packaging as shown in the inset in Fig. 7. The cathode was soldered on the shell, and the anode was connected to the pin though multiple aluminum wire bonding. After that, a parallel sealing and welding process was used to seal the chip in the shell in a nitrogen environment and inert gas was used for protection. As shown in Fig. 7(a), The V_on and the R_on are 0.75 V and 121 mΩ, respectively and a forward current of 8.7 A @ 2 V. The breakdown voltage of the SBD is more than 700 V because of the combination of OA and SAMT, as shown in Fig. 7(b).

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Several reported state-of-the-art β-Ga₂O₃ devices with approximate sizes (area ≥ 0.8 mm²) are also summarized. Figure 8 shows the benchmark of large area devices between SBDs, PN diodes and Junction Barrier Schottky Diode (JBSD) diodes in the plot of forward current (@2 V) versus breakdown voltage. ^5,14–25) Compared with the other devices, our device is at the forefront of the reported work with a PFOM of 45 MW cm⁻². For a higher forward current in devices, advanced double-sided packaging and substrate thinning methods are research directions that need to be considered later, as demonstrated by the results reported by Xiao. ¹⁸⁾

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In summary, we successfully developed high performance β-Ga₂O₃ SBDs by combining the surface pre-treatment method of OA with mesa termination. The characterization results of the devices demonstrate that OA can effectively reduce the surface roughness, and the density and the size of etch pits on the epitaxial layer. It leads to a decrease in the electric field at the pit bottom, resulting in a lower device leakage current and a higher breakdown voltage. Based on this approach, a large area device (3 × 3 mm²) with a forward current of 8.7 A@2 V and a breakdown voltage > 700 V was simultaneously prepared, further confirming the feasibility of this structure in actual high power applications. Moreover, this solution has obvious cost advantages compared with the reported devices with complex terminal structures, making it one of the solutions for commercial β-Ga₂O₃ SBD production.

Acknowledgments