Abstract
This paper presents the design and electrical test results of a low-noise front-end chip (named Topmetal-S) in a High-pressure Time Projection Chamber (TPC) for searching the neutrinoless double beta decay. The Topmetal-S has been fabricated in a 130 nm CMOS technology. The proposed front-end chip consists of a charge collection electrode, a Charge Sensitive Amplifier (CSA) and peripheral circuits. The test results indicate that the CSA features an input linear dynamic range of approximately 6.64 fC, a charge-conversion gain of about 220 mV/fC and an Equivalent Noise Charge (ENC) of approximately 115 e- after a digital trapezoidal pulse shaper.