李树国 - 清华大学 - 集成电路学院

研究领域

密码算法硬件加速及其低功耗研究与实现同态加密及后量子密码算法硬件加速研究与实现

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Z. Gu and S. Li, "Optimized Interpolation of Four-Term Karatsuba Multiplication and a Method of Avoiding Negative Multiplicands," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 69, no. 3, pp. 1199-1209, March 2022. W. Guo, S. Li and L. Kong, "An Efficient Implementation of KYBER," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 69, no. 3, pp. 1562-1566, March 2022. Yufei Xing and Shuguo Li, ”A Compact Hardware Implementation of CCA-Secure Key Exchange Mechanism CRYSTALS-KYBER on FPGA,” in IACR Transactions on Cryptographic Hardware and Embedded Systems, vol. 2021, issue 2, pp. 328-356. T. Kong and S. Li, "Design and Analysis of Approximate 4–2 Compressors for High-Accuracy Multipliers," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 29, no. 10, pp. 1771-1781, Oct. 2021. W. Guo and S. Li, "Fast Binary Counters and Compressors Generated by Sorting Network," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 29, no. 6, pp. 1220-1230, June 2021. L. Kong, S. Li and R. Liu, "High-Performance Constant-Time Discrete Gaussian Sampling," in IEEE Transactions on Computers, vol. 70, no. 7, pp. 1019-1033, 1 July 2021. Y. Xing and S. Li, "An Efficient Implementation of the NewHope Key Exchange on FPGAs," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 67, no. 3, pp. 866-878, March 2020. J. Ding and S. Li, "A Low-Latency and Low-Cost Montgomery Modular Multiplier Based on NLP Multiplication," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 67, no. 7, pp. 1319-1323, July 2020. X. Feng, S. Li and S. Xu, "RLWE-Oriented High-Speed Polynomial Multiplier Utilizing Multi-Lane Stockham NTT Algorithm," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 67, no. 3, pp. 556-559, March 2020. Z. Gu and S. Li, "A Generalized RNS Mclaughlin Modular Multiplication with Non-Coprime Moduli Sets," in IEEE Transactions on Computers, vol. 68, no. 11, pp. 1689-1696, 1 Nov. 2019. Z. Gu and S. Li, "A Division-Free Toom–Cook Multiplication-Based Montgomery Modular Multiplication," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 66, no. 8, pp. 1401-1405, Aug. 2019. J. Ding, S. Li and Z. Gu, "High-Speed ECC Processor Over NIST Prime Fields Applied With Toom–Cook Multiplication," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 66, no. 3, pp. 1003-1016, March 2019. X. Feng and S. Li, "Accelerating an FHE Integer Multiplier Using Negative Wrapped Convolution and Ping-Pong FFT," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 66, no. 1, pp. 121-125, Jan. 2019. L. Li and S. Li, "High-Performance Pipelined Architecture of Point Multiplication on Koblitz Curves," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 65, no. 11, pp. 1723-1727, Nov. 2018. J. Ding and S. Li, "A Modular Multiplier Implemented With Truncated Multiplication," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 65, no. 11, pp. 1713-1717, Nov. 2018. L. Li and S. Li, "Improved Algorithms and Implementations for Integer to $\tau $ NAF Conversion for Koblitz Curves," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 65, no. 1, pp. 154-162, Jan. 2018. X. Feng and S. Li, "Design of an Area-Effcient Million-Bit Integer Multiplier Using Double Modulus NTT," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 25, no. 9, pp. 2658-2662, Sept. 2017. L. Li and S. Li, "High-Performance Pipelined Architecture of Elliptic Curve Scalar Multiplication Over GF( ${2}^{m}$ )," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 24, no. 4, pp. 1223-1232, April 2016.