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A survey on partitioning models, solution algorithms and algorithm parallelization for hardware/software co-design
Design Automation for Embedded Systems ( IF 1.4 ) Pub Date : 2019-04-30 , DOI: 10.1007/s10617-019-09220-7
Neng Hou , Xiaohu Yan , Fazhi He

In electronic design automation, hardware/software co-design significantly reduces the time-to-market and improves the performance of embedded systems. With the increasing scale of applications and complexity of hardware architecture of embedded systems, hardware/software co-design is still a research hotspot. As hardware/software co-design is a wide topic, this paper focuses on major developments of three important aspects related to hardware/software partitioning, which has great effects on the performance of embedded systems. Firstly, various partitioning models including hardware architectures and abstract models are surveyed. Secondly, classical and new algorithms for hardware/software partitioning are classified and analyzed. Thirdly, existing parallel algorithms for hardware/software co-design are discussed in details. Finally, possible research directions are pointed out in conclusion.

中文翻译:

硬件/软件协同设计的分区模型,解决方案算法和算法并行化调查

在电子设计自动化中,硬件/软件协同设计可大大缩短产品上市时间并提高嵌入式系统的性能。随着应用规模的增加和嵌入式系统硬件体系结构的复杂性,硬件/软件协同设计仍然是研究的热点。由于硬件/软件协同设计是一个广泛的主题,因此本文重点讨论与硬件/软件分区有关的三个重要方面的主要发展,这对嵌入式系统的性能有很大影响。首先,研究了各种分区模型,包括硬件体系结构和抽象模型。其次,对硬件和软件分区的经典算法和新算法进行了分类和分析。第三,详细讨论了用于硬件/软件协同设计的现有并行算法。最后,
更新日期:2019-04-30
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