The development of IoT (Internet of Things) calls for circuit designs with energy and area efficiency for edge devices. Approximate computing which trades unnecessary computation precision for hardware cost savings is a promising direction for error-tolerant applications. Multipliers, as frequently invoked basic modules which consume non-trivial hardware costs, have been introduced approximation to achieve distinct energy and area savings for data-intensive applications. In this paper, we propose a fixed-point approximate multiplier that employs a linear mapping technique, which enables the configurability of approximation levels and the unbiasedness of computation errors. We then introduce a dynamic truncation method into the proposed multiplier design to cover a wider and more fine-grained configuration range of approximation for more flexible hardware cost savings. In addition, a novel normalization module is proposed for the required shifting operations, which balances the occupied area and the critical path delay compared with normal shifters. The introduced errors of our proposed design are analyzed and expressed by formulas which are validated by experimental results. Experimental evaluations show that compared with accurate multipliers, our proposed approximate multiplier design provides maximum area and power savings up to 49.70% and 66.39% respectively with acceptable computation errors.

IoT（物联网）的发展要求边缘设备的电路设计具有能源效率和面积效率。近似计算以不必要的计算精度来换取硬件成本的节省，对于容错应用来说是一个有前途的方向。乘法器是经常调用的消耗大量硬件成本的基本模块，已引入近似值，以实现数据密集型应用的显着能源和面积节省。在本文中，我们提出了一种采用线性映射技术的定点近似乘法器，该乘法器实现了近似级别的可配置性和计算误差的无偏性。然后，我们将动态截断方法引入到所提出的乘法器设计中，以覆盖更广泛、更细粒度的近似配置范围，从而更灵活地节省硬件成本。此外，针对所需的移位操作提出了一种新颖的归一化模块，与普通移位器相比，该模块平衡了占用面积和关键路径延迟。我们对所提出的设计引入的误差进行了分析并用公式表示，并通过实验结果进行了验证。实验评估表明，与精确乘法器相比，我们提出的近似乘法器设计可最大程度地节省面积和功耗，分别高达 49.70% 和 66.39%，且计算误差可接受。与普通移位器相比，它平衡了占用面积和关键路径延迟。我们对所提出的设计引入的误差进行了分析并用公式表示，并通过实验结果进行了验证。实验评估表明，与精确乘法器相比，我们提出的近似乘法器设计可最大程度地节省面积和功耗，分别高达 49.70% 和 66.39%，且计算误差可接受。与普通移位器相比，它平衡了占用面积和关键路径延迟。我们对所提出的设计引入的误差进行了分析并用公式表示，并通过实验结果进行了验证。实验评估表明，与精确乘法器相比，我们提出的近似乘法器设计可最大程度地节省面积和功耗，分别高达 49.70% 和 66.39%，且计算误差可接受。