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An FPGA-based front-end module emulator for the High Granularity Timing Detector
Journal of Instrumentation ( IF 1.3 ) Pub Date : 2024-03-26 , DOI: 10.1088/1748-0221/19/03/c03055
Zhenwu Ge , Jie Zhang , Lei Zhang , Liangliang Han ,

This paper introduces an FPGA-based front-end module emulator developed for the High Granularity Timing Detector (HGTD) within the ATLAS experiment at LHC. The emulator serves as a debugger for the HGTD readout system during the stage when the front-end module is not available. Using a Xilinx-Spartan 7 FPGA, the emulator mimics the behavior of the ASIC utilized in the front-end module. In addition, it shares the same dimensions and connectors as its successor, the real front-end module. This emulator has been effectively employed in the design and testing of the HGTD.

中文翻译:

用于高粒度定时检测器的基于 FPGA 的前端模块仿真器

本文介绍了一种基于 FPGA 的前端模块仿真器,该仿真器是为 LHC ATLAS 实验中的高粒度定时检测器 (HGTD) 开发的。在前端模块不可用的阶段,仿真器充当 HGTD 读出系统的调试器。该仿真器使用 Xilinx-Spartan 7 FPGA 模拟前端模块中使用的 ASIC 的行为。此外,它与其后继产品(真正的前端模块)具有相同的尺寸和连接器。该仿真器已有效地应用于HGTD的设计和测试中。
更新日期:2024-03-26
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