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One-Bit DOA Estimation Using Cross-Dipole Array Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-05-01
Abstract In this paper, we devise an effective algorithm for direction-of-arrival (DOA) estimation using the cross-dipole array via one-bit quantization. Firstly, we theoretically prove that after one-bit quantization, two circular complex Gaussian random processes with different variance still satisfy the arcsine law and calculate the normalized covariance matrix of the cross-dipole array output based
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Area and Power Efficient AVLS-TSPC-Based Diffused Bit Generator for Key Generation Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-05-01 B. S. Premananda, Abdur Rehman, P. Megha
Abstract The diffused bit generator (DBG) is an entropy generator that generates a stream of random bits. DBG is realized using a linear feedback shift register (LFSR) and cellular automata (CA). LFSR and CA are realized using flip-flops and XOR gates. The flip-flops required are designed using true single-phase clock (TSPC)-based logic to minimize the area and power of the LFSR and CA circuits. The
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Cross-Convolution Approach for Delay Estimation in Fractional-Order Time-Delay Systems Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-29 Sharefa Asiri, Da-Yan Liu
Several real-life problems that involve a time delay are modeled using fractional time-delay systems. However, most studies related to these systems assume that the delay is already known, which is not the case in practical scenarios where the delay is often uncertain or unknown. To address this issue, this paper proposes an algebraic and robust method to estimate the input delay for a class of fractional
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Premature Ventricular Contractions Detection by Multi-Domain Feature Extraction and Auto-Encoder-based Feature Reduction Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-26 Maryam Ebrahimpoor, Mehdi Taghizadeh, Mohammad Hossein Fatehi, Omid Mahdiyar, Jasem Jamali
Cardiovascular disorders are known to be among the most severe diseases and the leading causes of mortality all over the globe. Premature ventricular contractions (PVC) are one of the most prevalent types of cardiac arrhythmia. Recording and analyzing electrocardiogram (ECG) signals is one of the most popular methods (the least intrusive and least expensive) for investigating cardiac disorders. In
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Event-Triggered Moving Horizon State Estimation for Discrete-Time Linear Systems Subject to Measurement Outliers Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-24 Zhilin Liu, Zhongxin Wang, Shouzheng Yuan, Simeng Song, Guosheng Li
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$$H_{-} / H_{\infty }$$ Fault Detection Observer Design for Switched Singular Systems with Persistent Dwell Time Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-24 Yuanyu Zheng, Yanhui Tong, Bixuan Huang, Yueying Wang
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Finite-Time and Fixed-Time Bipartite Consensus of Multiple Euler–Lagrange Systems via Hierarchical Control Algorithm Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-24
Abstract This paper investigates the finite-time and fixed-time bipartite consensus problem of multiple Euler–Lagrange systems (MELSs) under directed interaction topologies, considering external disturbances. Two novel distributed hierarchical control algorithms are developed to address the challenging problems. Specifically, a new distributed estimator is designed to estimate the states of agents
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Observer Design for Nonlinear Descriptor Systems: A Survey on System Nonlinearities Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-23 Meenakshi Tripathi, Lazaros Moysis, Mahendra Kumar Gupta, George F. Fragulis, Christos Volos
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Artificial Intelligence Approach for Tuning Speech-Adaptive Watermarking using Higher-Order Statistics (HOS) Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-22 Xin Liu, Mohammad Ali Nematollahi
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Variable STFT Layered CNN Model for Automated Dysarthria Detection and Severity Assessment Using Raw Speech Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-22
Abstract This paper presents a novel approach for automated dysarthria detection and severity assessment using a variable short-time Fourier transform layered convolutional neural networks (CNN) model. Dysarthria is a speech disorder characterized by difficulties in articulation, resulting in unclear speech. The model is evaluated on two datasets, TORGO and UA-Speech, consisting of individuals with
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A Novel Source Enumeration Method Based on Sparse Representation Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-21 Qing Pan, Yechun Ma, Nili Tian, Huitang Jiang
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Deep Learning-Based Empirical and Sub-Space Decomposition for Speech Enhancement Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-20 Khaoula Mraihi, Mohamed Anouar Ben Messaoud
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Low-Dose CT Denoising Algorithm Based on Image Cartoon Texture Decomposition Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-18 Hao Chen, Yi Liu, Pengcheng Zhang, Jiaqi Kang, Zhiyuan Li, Weiting Cheng, Zhiguo Gui
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Fixed-Time Stability of Time-Varying Hybrid Systems with Time-Delay Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-15 Guopei Chen, Ying Yang
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A Novel Tracking Algorithm Based on Waveform Selection for Maneuvering Targets in Clutter Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-14 Jieyu Huang, Junwei Xie, Haowei Zhang, Zhengjie Li, Cheng Qi
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A Novel Current Mode Approximate Multiplier Scheme Based on 4:2 and 5:2 Compressors with Low Power Consumption and High Speed in CNTFET Technology Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-11 Pegah Foroutan, Keivan Navi
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Robust Stability of Semi-Markovian Complex-Valued Neural Networks with Generally Uncertain Transition Rates Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-11
Abstract This paper investigates the stability of complex-valued neural networks (CVNNs) with semi-Markovian jump (sMJ) and generally uncertain transition rates. Each transition rate may be totally unknown or its estimate is determined. Firstly, two improved reciprocally convex inequalities (RCIs) and three less conservative integral inequalities are generalized to the complex-valued domain. Secondly
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Modified Model of RLS Adaptive Filter for Noise Cancellation Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-11 Nilesh Kumar Yadav, Amit Dhawan, Manish Tiwari, Sumit Kumar Jha
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Enhancing Children’s Short Utterance-Based ASV Using Inverse Gamma-tone Filtered Cepstral coefficients Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-10
Abstract The task of developing an automatic speaker verification (ASV) system for children’s speech is extremely challenging due to the dearth of domain-specific data. The challenges are further exacerbated in the case of short utterances of speech, a relatively unexplored domain in the case of children’s ASV. Voice-based biometric systems require an adequate amount of speech data for enrollment and
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A Wide Dynamic Range CMOS Differential Rectifier for Radio Frequency Energy Harvesting Systems Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-08 Ataollah Mahsafar, Mohammad Yavari
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Design of ECG Denoising Digital Filter Under $$\alpha $$ -Stable Noisy Environment Based on Morphological Signal Processing Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-08
Abstract This paper proposes a digital morphological filtering method based on a novel structuring element (SE) formulated using fractional Fourier transform (FrFT) and cross-convolution of window functions. The highlighting feature of this newly formulated filter is its flexibility in adding an adaptive nature to classical morphological filtering. Until now, every method listed in the literature makes
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Electrocardiogram Denoising Based on SWT and WATV Using ANNs Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-08 Abdallah Rezgui, Brahim Nasraoui, Mourad Talbi
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Role of Data Augmentation and Effective Conservation of High-Frequency Contents in the Context Children’s Speaker Verification System Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-05 Shahid Aziz, S. Shahnawazuddin
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On the Layout-Oriented Investigation of Power Attack Hardness of Spintronic-Based Logic Circuits Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-01-31 Pegah Iranfar, Abdolah Amirany, Mohammad Hossein Moaiyeri, Kian Jafari
High leakage power consumption has become one of the main concerns of data security protection with CMOS device scaling. Spintronic technology is one of the efficient solutions to control circuit leakage power consumption by benefiting from its non-volatility property. Spintronic devices such as magnetic tunnel junctions (MTJs) are also compatible with CMOS transistors and suitable for designing hybrid
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Energy-Efficient Exact and Approximate CNTFET-Based Ternary Full Adders Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-01-29 Aiman Malik, Md Shahbaz Hussain, Mohd. Hasan
Ternary circuits are promising due to their lower interconnect complexity, storage requirement, and lesser pin count than binary circuits. The adder is one of the most important building blocks of a digital processor. This paper proposes carbon nanotube field effect transistor (CNTFET)-based ‘exact’ and ‘approximate’ ternary full adders (TFA). The CNTFET is attractive for realizing multi-valued logic
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Dissipative Filtering of Markovian Jumping Systems via Adaptive Sliding Mode Control Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-01 Guoqing Zhai, Qiaoyu Chen, Dongbing Tong, Wuneng Zhou, Shigen Shen
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Complex Total Least Mean M-Estimate Adaptive Algorithm for Noisy Input and Impulsive Noise Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-01 Zian Cao, Haiquan Zhao, Yalin Liu, Yida Chen
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Long-Time Speech Emotion Recognition Using Feature Compensation and Accentuation-Based Fusion Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-01 Jiu Sun, Jinxin Zhu, Jun Shao
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Robust Static Output Feedback $$H_{\infty }$$ Controller Design for Linear Parameter-Varying Time Delay Systems Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-01 Mehmet Nur Alpaslan Parlakci
Abstract This paper addresses the problem of synthesizing an \(H_{\infty }\) static output feedback controller for linear parameter-varying (LPV) time delay systems subject to time-varying delay. The motivation for this research stems from the challenges associated with designing controllers for such systems. In addition to considering the static output feedback controller design, we also explore the
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Constant Q Cepstral Coefficients for Automatic Speaker Verification System for Dysarthria Patients Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-01 Shinimol Salim, Waquar Ahmad
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Implementation and Applications of a Ternary Threshold Logic Gate Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-02-01 Ahmet Unutulmaz, Cem Ünsalan
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Optimized Sigmoid Functions for Speech Presence Probability and Gain Function in Speech Enhancement Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-01-22 Hai Huyen Dam, Sven Nordholm, Pei Chee Yong, Siow Yong Low
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Insights into the Filtered-x LMS Algorithm in the Presence of Frequency Mismatch Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-01-13 Jian Liu, Huawei Chen
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Least-Squares Algorithms for Complex-Valued Blind Source Separation Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-01-09
Abstract Blind source separation (BSS), as a digital signal processing approach, focuses on estimating the underlying source signals from their linear mixtures without any prior information about the source signals and mixing matrix. Conventional methods for the BSS, however, are incapable of separating the complex-valued source signals. By leveraging the negative conjugate gradient to minimize the
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Robust DOA Estimator Against Mutual Coupling Using One-Bit Sampling Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-01-09 Ning Guo, Zhi Zheng, Wen-Qin Wang
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A Dual-Layer Network Deep Reinforcement Learning Algorithm for Multi-objective Signal Temporal Logic Tasks Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-01-06 Yixiao Yang, Tiange Yang, Yuanyuan Zou, Shaoyuan Li, Yaru Yang
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CCCCTA-based Chua’s Circuit for Chaotic Oscillation Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-01-06 Vivek Bhatt, Ashish Ranjan, Manoj Joshi
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Global Robust Exponential Synchronization of Interval BAM Neural Networks with Multiple Time-Varying Delays Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-01-04 Jinbao Lan, Xin Wang, Xian Zhang
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Stability of Interfered Discrete-Time System with Concatenations of Quantization and Overflow Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2024-01-01 Mounika Pulikonda, Priyanka Kokil
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Low-Dose CT Image Denoising with a Residual Multi-scale Feature Fusion Convolutional Neural Network and Enhanced Perceptual Loss Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2023-12-29 Farzan Niknejad Mazandarani, Paul Babyn, Javad Alirezaie
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Non-fragile Robust $$H_{\infty }$$ Control for Nonlinear Uncertain Neutral Stochastic Fuzzy Systems with Mixed Time-Delays Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2023-12-28
Abstract This paper investigates the non-fragile robust \(H_{\infty }\) control problem of nonlinear uncertain neutral stochastic Takagi–Sugeno (T–S) fuzzy systems with mixed time-delays. The uncertainties are norm-bounded and time-varying. Sufficient conditions for \(H_{\infty }\) performance analysis results of the delay-dependent condition is established via the Lyapunov–Krasovskii functional (LKF)
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Multistability and Four-Scroll Chaos in a Pair of Coupled Second-Order Damped Oscillators with Hyperbolic Sine Function: Theoretical Study and Circuit Simulation Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2023-12-28
Abstract It is known that the coupling of nonlinear oscillators can result in extremely rich and complex dynamics not found in an isolated oscillator. This work introduces a novel four-dimensional autonomous system designed by coupling two second-order damped oscillators with hyperbolic sine nonlinearity in such a way that each oscillator is perturbed by a signal proportional to the amplitude of the
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On the NP-VSS-NLMS Algorithm: Model, Design Guidelines, and Numerical Results Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2023-12-27 Augusto Cesar Becker, Eduardo Vinicius Kuhn, Marcos Vinicius Matsuo, Jacob Benesty
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RAttSR: A Novel Low-Cost Reconstructed Attention-Based End-to-End Speech Recognizer Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2023-12-24 Bachchu Paul, Santanu Phadikar
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The Uniqueness of Phase Retrieval of Analytic Signals from Very Few STFT Measurements Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2023-12-24 Youfa Li, Hongfei Wang, Deguang Han
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An Effective Speech Emotion Recognition Model for Multi-Regional Languages Using Threshold-based Feature Selection Algorithm Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2023-12-22 Radhika Subramanian, Prasanth Aruchamy
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Power–Area-Optimized Approximate Multiplier Design for Image Fusion Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2023-12-19 Garima Thakur, Harsh Sohal, Shruti Jain
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Improving the Efficiency of Automatic Cardiac Arrhythmias Classification by a Novel Patient-Specific Feature Space Mapping Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2023-12-18 Hamid Shafaatfar, Mehdi Taghizadeh, Morteza Valizadeh, Mohammad Hossein Fatehi
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FPGA Design and Implementation of Improved DFxLMS Algorithm for Compressor Noise Cancellation System Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2023-12-16 Jun Yuan, Yuyang Zhang, Caizheng Yuan, Xiangsheng Meng, Yonghong Pan
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Unsupervised Deep-Embedding Global Feature Descriptor for Image Retrieval Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2023-12-16 Qiaoping He
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Unfolding VLSI Architecture for Mixed Noise Removal and Multiple Classification of ECG Signals Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2023-12-16 R. Swetha, Sabitha Ramakrishnan
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Speech Emotion Recognition Using Generative Adversarial Network and Deep Convolutional Neural Network Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2023-12-16 Kishor Bhangale, Mohanaprasad Kothandaraman
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A New Algorithm for Speech Feature Extraction Using Polynomial Chirplet Transform Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2023-12-12 Hao Do-Duc, Duc Chau-Thanh, Son Tran-Thai
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A Correlation-Less Approach Toward the Steepest-Descent-Based Adaptive Channel Equalizer Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2023-12-11 Aneela Pathan, Tayab Din Memon, Rizwan Aziz Mangi
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Positive Real Lemmas for Fractional-Order Two-Dimensional Roesser Model: The $$0< \rho _1\le 1,0<\rho _2\le 1$$ Case Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2023-12-11 Jia-Rui Zhang, Jun-Guo Lu
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Non-local Graph Convolutional Network Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2023-12-11 Chunyu Du, Shuai Shao, Jun Tang, Xinjing Song, Weifeng Liu, Baodi Liu, Yanjiang Wang
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Annular Finite-Time $$H_{\infty }$$ Filtering for Mean-Field Stochastic Systems Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2023-12-11 Jijing Zhuang, Yan Li, Xikui Liu
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An Improved Non-cascade Adaptive Integral Sliding Mode Control for PMSM Servo Systems Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2023-12-11 Zhiyuan Che, Haitao Yu, Saleh Mobayen, Murad Ali
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Underdetermined Blind Source Separation Based on Spatial Estimation and Compressed Sensing Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2023-12-08 Shuang Wei, Rui Zhang
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Multi-Combined-Step-Size Normalized Subband Adaptive Filtering Algorithm Circuits Syst. Signal Process. (IF 2.3) Pub Date : 2023-12-08 Wenting Feng, Hongyu Han, Huchuan Tang