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Device Reliability and Effect of Temperature On Memristors: Nanostructured V2O5 IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-04-23 Sharmila B, Ashutosh Kumar Dikshit, Priyanka Dwivedi
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Universal Dielectric Breakdown Modeling Under Off-State TDDB for Ultra-Scaled Device From 130nm to 28nm Nodes and Beyond IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-04-22 Tidjani Garba-Seybou, Alain Bravaix, Xavier Federspiel, Joycelyn Hai, Cheikh Diouf, Florian Cacho
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Modeling of Temperature Rises at Focal-Plane-Array and Their Impact on the Performance of a CCD-Based Spaceborne Earth-Observing Imaging System IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-04-18 Chahira Serief, Nassima Khorchef, Youcef Guelamallah
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Study on Characteristics and UIS of Hexagonal Planar SiC VDMOSFETs With Varied JFET Width IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-04-16 Hou-Cai Luo, Huan Wu, Jing-Ping Zhang, Bo-Feng Zheng, Lei Lang, Guo-Qi Zhang, Xian-Ping Chen
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Aging Reliability Compact Modeling of Trap Effects in Power GaN HEMTs IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-04-12 Yanfeng Ma, Sheng Li, Mengli Liu, Weihao Lu, Mingfei Li, Siyang Liu, Long Zhang, Jiaxing Wei, Lanlan Yang, Weifeng Sun, Jiaxin Sun
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TDDB Lifetime Reduction From Charging Damage in a 3D Vertical NAND Memory Technology IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-04-10 Daniel Beckmeier, Charles LaRow, Andreas Kerber
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A Low Area-Overhead and Low Delay Triple-Node-Upset Self-Recoverable Design Based On Stacked Transistors IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-04-10 Hui Xu, Jiuqi Li, Ruijun Ma, Huaguo Liang, Chaoming Liu, Senling Wang, Xiaoqing Wen
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Effects of Solder Mask Variability on the Electrical Response of Commercially Manufactured Interdigitated Circuits IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-04-01 Roshaun C. Titus, Miriam R. Rath, Rosario A. Gerhardt, J. Elliott Fowler
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The Characteristics and Reliability With Channel Length Dependent on the Deposited Sequence of SiO2 and Si3N4 as PV in LTPS TFTs IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-04-01 Chuan-Wei Kuo, Tsung-Ming Tsai, Ting-Chang Chang, Hong-Yi Tu, Yu-Hsiang Tsai, Jian-Jie Chen, I-Yu Huang
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From Accelerated to Operating Conditions: How Trapped Charge Impacts on TDDB in SiO2 and HfO2 Stacks IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-04-01 Sara Vecchi, Andrea Padovani, Paolo Pavan, Francesco Maria Puglisi
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A DLTS Study on Deep Trench Processing Induced Trap States in Silicon Photodiodes IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-03-27 Paul Stampfer, Frederic Roger, Lukas Cvitkovich, Tibor Grasser, Michael Waltl
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Cause Analysis on the Abnormal Failure of SiC Power Modules During the HV-H3TRB Tests IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-03-20 Jie Chen, Shuang Zhou, Zhen-Guo Yang
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A Review: Breakdown Voltage Enhancement of GaN Semiconductors Based High Electron Mobility Transistors IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-03-20 Osman Çiçek, Yosef Badali
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Call for Nominations Editor-in-Chief IEEE Transactions on Device and Materials Reliability IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-03-08
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IEEE Transactions on Device and Materials Reliability Information for Authors IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-03-08
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IEEE Transactions on Device and Materials Reliability Publication Information IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-03-08
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TechRxiv: Share Your Preprint Research with the World! IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-03-08
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Optimization of 3D IC Routing Based on Thermal Equalization Analysis IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-03-08 Le Liu, Fengjuan Wang, Xiangkun Yin, Chuanhong Sun, Xiang Li, Yue Li, Ningmei Yu, Yuan Yang
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Special Issue on Semiconductor Design for Manufacturing (DFM)Joint Call for Papers IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-03-08
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Failure Mechanism and Predictive Modeling for Microbump Interconnects Drop Life Under Diverse Impact Angles in Advanced Packaging IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-02-27 Yangtao Long, Mingtao Lv, Hu He
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Analysis of Multicrystalline Si Solar Cell Improvement Using Laser-Beam-Induced Current Technique IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-02-19 T. Takeshita, E. Murakami
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Correlation of Radiation-Induced Interface Traps With Band Edge Energy Through Band Structure-Based Analysis of Electrostatics of UTB SOI Devices IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-02-16 Nalin Vilochan Mishra, Aditya Sankar Medury
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Electro-Mechanical Properties of Molybdenum Thin Film On Polyethylene Terephthalate Subjected to Tensile Stress IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-02-16 Atif Alkhazali, Mohammad M. Hamasha, Haitham Khaled, Awni Alkhazaleh, Morad Etier
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Effect of Hydrogen Molecule Release On NBTI By Low-Temperature Pre-Treatment in P-Channel Power VDMOS Transistors IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-02-14 Fengkai Liu, Cuancuan Zhu, Zhongli Liu, Jianqun Yang, Yadong Wei, Yubao Zhang, Xingji Li
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Power Cycling Modeling and Lifetime Evaluation of SiC Power MOSFET Module Using a Modified Physical Lifetime Model IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-02-13 Hsien-Chie Cheng, Ji-Yuan Syu, He-Hong Wang, Yan-Cheng Liu, Kuo-Shu Kao, Tao-Chih Chang
This study aims to explore the solder fatigue lifetime of a developed high-voltage (1.7 kV/100 A) SiC power MOSFET module for on-board chargers (OBCs) subjected to power cycling test (PCT) in accordance with AQG 324. To achieve this goal, a design for reliability (DfR) methodology is established, which couples three-dimensional (3D) thermal computational fluid dynamics (CFD) analysis with 3D transient
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Aging and Sintered Layer Defect Detection of Discrete MOSFETs Using Frequency Domain Reflectometry Associated With Parasitic Resistance IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-02-08 Minghui Yun, Daoguo Yang, Miao Cai, Haidong Yan, Jiabing Yu, Mengyuan Liu, Siliang He, Guoqi Zhang
Metal-oxide-semiconductor field-effect transistors (MOSFETs) undergo fatigue degradation under high thermal and electrical stresses. This process results in changes in their parasitic parameters, which can be detected using frequency domain reflectometry (FDR). Frequency domain impedance analysis is employed to characterize the various quality states of Si and SiC MOSFETs obtained from accelerated
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Characterization and Modeling of Hot Carrier Degradation Under Dynamic Operation Voltage IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-01-29 Yanning Chen, Kai Wang, Jin Shao, Fang Liu, Xinhuan Yang, Jianyu Zhang, Qianqian Sang, Chuanzheng Wang, Yuanfu Zhao
In practical electronic setups, most circuits are operating under dynamic condition, thus the aging models derived under static bias could lead to unexpected deviation from the real circumstance and even errors. Here in this paper, we studied the device degradation under long-period dynamic stress, which aims to mimic the device degradation at alternating voltages. Combined with the degradation characterization
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Data-Driven Stress/Warpage Analyses Based on Stoney Equation for Packaging Applications IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-01-10 Kuo-Shen Chen, Wen-Chun Wu
Stress and warping analyses are frequently required in modern semiconductor and packaging processing. Accurately predicting the structural stress and warping topology is crucial for improving processing reliability. Simple analytic models and their revised forms are typically used for quick estimation. However, these revised analytical forms often rely on considering just a single modification factor
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A Source Segmented LDMOS Structure for Improving Single Event Burnout Tolerance Based on High-Voltage BCD Process IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2024-01-04 Jiang Xu, Zeyu Lei, Chenchen Zhang, Xin Wan, Zhuojun Chen
The Lateral Diffused Metal Oxide Semiconductor (LDMOS) is vulnerable to Single-Event Burnout (SEB) effect in the radiation environment, which is challenging for the design of high-voltage integrated circuit (HVIC). In this work, a Source-Segmented LDMOS (SS-LDMOS) structure for SEB hardness is proposed, which can reduce parasitic resistor and enhance hole discharge capacity nearby the source region
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Investigation on Electrical Properties of Printed Graphene Subjected to Aging, Ambient Environment and Gamma Radiation IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-12-28 Kevin Goodman, Roberto S. Aga, Rachel Aga, Robert Cooper, Lei R. Cao, Emily Heckman
Advancements in printable electronics technology allow the technique to populate laboratories on a widespread scale due to advantages printing electronics holds over customary fabrication methods. For utilization of printed electronics in cosmic environments it behooves end-users to understand the effects of ionizing radiation on these materials as such a threat to microelectronics can be quite detrimental
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Side-Channel Attack Resilient RHBD 12T SRAM Cell for Secure Nuclear Environment IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-12-25 Syed Farah Naz, Debabrata Mondal, Ambika Prasad Shah
Extremely energetic particles in the nuclear environment make memory cells prone to soft errors. Also, attackers extract secret data of SRAM cells via side-channel attacks (SCAs), and leakage power analysis attacks (LPAs) seriously threaten security systems. This paper indicates a highly effective radiation-hardened and LPA-resilient (RHLR12T) SRAM cell that is both radiation-resistant by design and
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PEAR: Unbalanced Inter-Page Errors Aware Read Scheme for Latency-Efficient 3-D NAND Flash IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-12-22 Meng Zhang, Fei Wu, Qin Yu, Changsheng Xie
Although three-dimensional (3D) NAND flash memory has demonstrated impressive benefits including high capacity and storage density, data reliability is now a major worry because of long-term storage and ongoing cell wear-out. Low-density parity-check (LDPC) codes are frequently utilized in flash storage systems because of their superior error correcting capabilities to guarantee data reliability. LDPC
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Detection and Analysis of Stress Wave in MOSFET Under Gate-Source Overvoltage Failure IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-12-21 Guangxin Wang, Yunze He, Xuefeng Geng, Longhai Tang, Songyuan Liu, Qiying Li, Kai Zhang
As a real-time, online, and non-invasive monitoring method, acoustic emission (AE) monitoring technology has a promising future in the condition monitoring and fault diagnosis of power devices such as power MOSFETs. Stress waves are generated when power MOSFETs are turned on and off. Currently, most scholars have only researched the influence of circuit parameters on stress waves in normal devices
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Utilizing Two Three-Transistor Structures for Designing Radiation Hardened Circuits IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-12-20 Xin Liu, Jiaxin Chen, Yinyu Liu, Ke Gu, Siqi Wang, Jianhui Bu, Quanfeng Zhou
This paper focuses on two types of three-transistor structures, known as PNN and PPN, which represent the number of PMOS and NMOS transistors in each configuration. These structures are characterized by their unidirectional flip at the output nodes, as they are spatially surrounded by N-type and P-type diffusion regions respectively. This characteristic makes them suitable for designing radiation-hardened
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Analyzing Total-Ionizing-Dose Induced Memory Window Degradation in Ferroelectric FinFET IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-12-20 Sola Woo, Khandker Akif Aabrar, Suman Datta, Shimeng Yu
The total-ionizing-dose (TID) effect of ferroelectric FinFET structure (Fe-FinFET) is analyzed under various gamma ray irradiation conditions. An TCAD model is developed to understand the physical mechanism of TID effect, and the simulation results are calibrated with the experimental data. We show that the TID-induced memory window degradation is attributed to two types of traps being generated within
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Reliability and Optimization Simulation Study of Zero-Temperature-Delay Point in Digital Circuits for Advanced Technology IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-12-19 Mingyue Zheng, Wangyong Chen, Yaoyang Lyu, Linlin Cai
Thermal challenges are increasingly significant for advanced technology, and the operating environment with large temperature variation also acts as one of the crucial threats to the system’s performance and reliability. To improve the temperature immunity of digital circuits, in this work, the supply voltage (VDD) making the delay immune to temperature variation is identified, which differs from the
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Characterization, Analysis, and Modeling of Long-Term RF Reliability and Degradation of SiGe HBTs for High Power Density Applications IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-12-15 Christoph Weimer, Gerhard G. Fischer, Michael Schröter
This paper aims at determining RF operating limits of SiGe HBTs. Long-term stress tests consisting of RF large-signal stress and periodic measurements of small-signal parameters are performed. Reliable dynamic large-signal transistor operation is demonstrated beyond conventional static safe operating limits. In addition, RF operating limits are identified and degradation of SiGe HBTs accelerated by
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Investigation of the Long-Term Reliability of a Velostat-Based Flexible Pressure Sensor Array for 210 Days IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-12-08 Anis Fatema, Shirley Chauhan, Mohee Datta Gupta, Aftab M. Hussain
Pressure sensors are subjected to continuous force and stress that may affect the operation of the sensor in the long run. Reliability is a crucial factor that must be considered when designing and fabricating any sensor. It is essential to test the material used in the sensor to assess the reliability of the complete product. In this work, we report the long-term reliability of a flexible pressure
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Degradation and Reliability Modeling of EM Robustness of Voltage Regulators Based on ADT: An Approach and a Case Study IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-12-07 Jaber Al Rashid, Mohsen Koohestani, Laurent Saintis, Mihaela Barreau
This paper presents an approach to develop degradation and reliability models of analog integrated circuit (IC) voltage regulators based on the long-term evolution of the electromagnetic compatibility (EMC) performance degradation due to the stress time-dependent accelerated degradation test (ADT). The ADT plan is designed and conducted on six samples of both UA78L05 and L78L05 ICs placed inside a
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A Comprehensive Evaluation of Time-Dependent Dielectric Breakdown of CuAl₂ on SiO₂ for Advanced Interconnect Application IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-12-07 Toshihiro Kuge, Masataka Yahagi, Junichi Koike
The intermetallic compound CuAl2 is a promising alternative to advanced Cu interconnections because of low electrical resistivity, short electron mean free path, good electromigration reliability, and good gap-filling property. In this study, to further examine the feasibility of CuAl2 interconnects for future technology node, a comprehensive study of the time-dependent dielectric breakdown (TDDB)
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Self-Heating Mapping of the Experimental Device and Its Optimization in Advance Sub-5 nm Node Junctionless Multi-Nanowire FETs IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-12-06 Nitish Kumar, Shraddha Pali, Ankur Gupta, Pushpapraj Singh
The junctionless multi-nanowire (JL-MNW) gate-all-around (GAA) field-effect transistor (FET) has become an emerging device in the advanced node of modern semiconductor devices because of its inherent operational mechanism properties. Therefore, in this paper, the Sentaurus TCAD simulator is calibrated with a compact thermal conductivity model using experimentally measured I-V characteristic data of
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Identification of Multiple Failure Mechanisms for Device Reliability Using Differential Evolution IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-10-31 Uttara Chakraborty, Emmanuel Bender, Duane S. Boning, Carl V. Thompson
Assessing the reliability of electronic devices, circuits and packages requires accurate lifetime predictions and identification of failure modes. This paper demonstrates a new approach to the extraction of underlying failure mechanism distribution parameters from data corresponding to a combined distribution of two distinct mechanisms. Specifically, a differential evolution approach is developed for
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Reliability Challenges in Advanced 3D Technologies: The Case of Through Silicon Vias and SiCN–SiCN Wafer-to-Wafer Hybrid-Bonding Technologies IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-10-25 Emmanuel Chery, Corinna Fohn, Joke De Messemaeker, Eric Beyne
As the traditional more Moore approach is slowing down, due to the increase in development costs and logic complexity, 3D technologies are enabling complex More than Moore Systems-on-Chip (SoC), offering higher performances and functionalities to customers. 3D SoC combine efficiently chips from different technology nodes through vertical interconnections, enabling complex designs out of reach of the
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Highly Reproducible and Reliable Methanol Sensor Based on Hydrothermally Grown TiO2 Nanoparticles IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-10-23 Nikita Kar Chowdhury, Aditya Kumar Singh, Arnab Hazra, Basanta Bhowmik
In the present paper, $TiO_{2}$ nanoparticles were synthesized through low cost hydrothermal method at 150°C. Structural, morphological and optical properties of the grown materials were characterized through X-ray diffraction (XRD), Field emission scanning electron microscopy (FESEM), Raman Spectroscopy, and Photoluminescence spectroscopy, respectively. X-ray diffraction confirms the anatase phase
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An Aging Small-Signal Equivalent Circuit Modeling Method for InP HBT IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-10-13 Lin Cheng, Hongliang Lu, Silu Yan, Junjun Qi, Wei Cheng, Yuming Zhang, Yimen Zhang
To predict the aging effect on indium phosphide (InP) heterojunction bipolar transistors (HBTs), an aging small-signal equivalent circuit modeling method is proposed in this paper, with special attention to the degradation of the key small-signal model parameters of the InP HBTs in aging experiments. Based on the analysis of the aging sensitivity of the complete small-signal equivalent circuit parameters
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Degradation Physics of Silicone Under UV-A Irradiation IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-10-13 Abdul Shabir, Cher Ming Tan, Preetpal Singh
Silicone possesses good thermal and chemical stability, hydrophobicity, and thus it has a wide range of application. It is also employed as encapsulant and housing for high power LEDs which are increasingly common for various kind of lighting applications. In outdoor applications of high-power LEDs, UV irradiation from sunlight is presence. There are also UV LEDs for other lighting applications, and
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A New SiC Quasi MOSFET for Ultra-Low Specific On-Resistance and Improved Reliability IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-10-12 Moufu Kong, Zeyu Cheng, Zewei Hu, Ning Yu, Bo Yi, Hongqiang Yang
In this paper, a new ultra-low specific on-resistance quasi SiC MOSFET is proposed. Compared with the conventional SiC MOSFET, the proposed quasi SiC MOSFET has no problems caused by low channel mobility and gate oxide reliability. And compared with the conventional SiC JFET, the proposed quasi SiC MOSFET is a normally-off device without the controllability issue of the normally-on device. Through
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Negative Bias Temperature Instability in Top-Gated Carbon Nanotube Thin Film Transistors With Y2O3 Gate Dielectric IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-10-05 Yuwei Wang, Sha Wang, Huaidong Ye, Wenhao Zhang, Li Xiang
The negative bias temperature instability (NBTI) of the top-gated p-type carbon nanotube (CNT) thin film transistors (TFTs) with yttrium oxide (Y2O3) dielectric is investigated under different gate bias, stress and relaxation time for the first time. Positive and fast reversible threshold voltage shift along with significant degradation of subthreshold and trans-conductance are observed. The effects
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Effect of Vapor Phase Infiltration on Metal-Polymer Adhesion for Ultra-Low-k Dielectric Materials IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-09-29 Pragna Bhaskar, Ethan Shackelford, Emily K. McGuinness, Mohan Kathaperumal, Mark D. Losego, Madhavan Swaminathan
This paper explores the effect of vapor phase infiltration (VPI) on ultra-low-k (ULK) dielectric materials. Adhesion of metals to these ultra-low-k polymers is an important factor in the fabrication of multilayer redistribution layer (RDL) structures and also the reliability of RDLs. ULK polymers have lower adhesion to metal films than the current industry standard, Ajinomoto Buildup Film (ABF). Earlier
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Reliability and Process Scalability of TiO2/Porous Silicon-Based Broadband Photodetectors IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-09-20 Sharmila B, Priyanka Dwivedi
This paper presents the reliability and process scalability aspects to fabricate efficient broadband photodetectors based on titanium dioxide (TiO2)/porous silicon (P-Si). Here we have compared the performance and photoresponse of the TiO2/P-Si photodetectors with the P-Si photodetectors. The photosensing performance of the fabricated photodetectors were tested in the broadband spectrum (ultraviolet
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Measurements and Review of Failure Mechanisms and Reliability Constraints of 4H-SiC Power MOSFETs Under Short Circuit Events IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-09-18 Renze Yu, Saeed Jahdi, Olayiwola Alatise, Jose Ortiz-Gonzalez, Sai Priya Munagala, Nick Simpson, Phil Mellor
The reliability of the SiC MOSFET has always been a factor hindering the device application, especially under high voltage and high current conditions, such as in the short circuit events. This paper experimentally reviews the failure mechanisms caused by destructive short circuit impulses, and investigates the degradation patterns of key electrical parameters under repetitive short circuit events
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Failure Mechanisms of Fluorine-Doped Tin Oxide Thin Films in Glass and Reliability Tests IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-09-18 Jihee Bae, Hyoungseuk Choi
Fluorine-doped tin oxide (FTO) is a transparent conductive oxide that is used in solar cells and energy devices. In this study, environmental tests and corresponding failure analyses were conducted to identify the failure mechanisms of FTO. An FTO thin film was prepared via spray pyrolysis deposition (SPD). Environmental tests were conducted in high-temperature and high-humidity environments, similar
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Characterization of LDO Induced Increment of SEE Sensitivity for 22-nm FDSOI SRAM IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-09-18 Chang Cai, Yuzhu Liu, Minchi Hu, Gengshen Chen, Jun Yu
The radiation sensitivity of the Static Random-Access Memory (SRAM) device depends on the basic memory cell and peripheral circuits, and the influence of peripheral circuits is difficult to measure and classify, especially for the internal low dropout regulator (LDO) modules. In this paper, the LDO with radiation-tolerant bipolar bandgap was designed and fabricated to provide power supply for Fully
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Single Pulse Charge Pumping Technique Improvement for Interface-States Profiling in the Channel of MOSFET Devices IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-09-15 DhiaElhak Messaoud, Boualem Djezzar, Mohamed Boubaaya, Abdelmadjid Benabdelmoumene, Boumediene Zatout, Amel Chenouf, Abdelkader Zitouni
This paper presents the separated single pulse charge pumping (SSPCP) technique, an improvement over conventional single pulse charge pumping (CSPCP) for analyzing metal oxide semiconductor field-effect transistor (MOSFET) degradation. SSPCP separates the measurement of source and drain currents $({I}_{ {s}}$ and ${I}_{ {d}}$ ), enabling the localization of interface traps $({N}_{ {it}})$ near these
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Analysis of the Extraction Method and Mechanism of Hot Carrier Degradation in Al2O3/Si3N4 Bilayer Gate Dielectric AlGaN/GaN MIS-HEMTs IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-09-14 Jen-Wei Huang, Po-Hsun Chen, Tsung-Han Yeh, Xin-Ying Tsai, Pei-Yu Wu
High-electron-mobility transistor (HEMT) based on Gallium Nitride (GaN) material is often designed for high-voltage operating conditions because of the high electric critical field of GaN material. However, such devices are often prone to the hot carrier stress (HCS) effect under high drain voltage and on-state conditions. Therefore, the HCS effect is an important consideration for reliable GaN HEMT
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Guest Editorial TDMR IIRW Special Section IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-09-06 Francesco Maria Puglisi
The IEEE International Integrated Reliability Workshop (IIRW) is a unique event that takes place every year at the beautiful Fallen Leaf Lake, South Lake Tahoe, CA, USA. The workshop brings together reliability engineers and researchers from all around the world, to exchange ideas over four days in a welcoming, pleasant, and informal setting. The workshop focuses on the recent advances in research
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Time-Dependent Dielectric Breakdown in 45-nm PD-SOI N-Channel FETs at Cryogenic Temperatures for Quantum Computing Applications IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-09-07 Asifa Amin, Sumreti Gupta, Purushothaman Srinivasan, Oscar H. Gonzalez, Fernando Guarin, Abhisek Dixit
The aim of this paper is to analyze the time-dependent dielectric breakdown (TDDB) in MOSFETs at cryo temperatures deployed in control circuitry for quantum computing applications. The effect of cryogenic temperatures down to 10K on TDDB in 45-nm RFSOI n-channel MOSFETs is studied here. From Weibull distribution, it is seen that the characteristic breakdown time (t63) increases with decreasing temperature
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Development of Diamond Device-Level Heat Spreader for the Advancement of GaN HEMT Power and RF Electronics IEEE Trans. Device Mat Reliab. (IF 2.0) Pub Date : 2023-08-31 Mei-Chien Lu
Wide bandgap power electronics have been commercialized for many applications. Gallium nitride (GaN) high electron mobility transistor (HEMT) has superior performance in high power and high frequency applications. The thermal dissipation issues such as self-heating have been hurdles for power density and frequency increases. The efforts of thermal management for hot spots elimination have been ongoing